From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org, linux-mm@kvack.org
Subject: Re: [PATCH -V1 09/24] powerpc: Decode the pte-lp-encoding bits correctly.
Date: Mon, 04 Mar 2013 23:41:01 +0530 [thread overview]
Message-ID: <87txor828a.fsf@linux.vnet.ibm.com> (raw)
In-Reply-To: <87vc971iwd.fsf@linux.vnet.ibm.com>
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> writes:
> Paul Mackerras <paulus@samba.org> writes:
>
>> On Tue, Feb 26, 2013 at 01:34:59PM +0530, Aneesh Kumar K.V wrote:
>>> From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
>>>=20
>>> +static inline int hpte_actual_psize(struct hash_pte *hptep, int psize)
>>> +{
>>> + unsigned int mask;
>>> + int i, penc, shift;
>>> + /* Look at the 8 bit LP value */
>>> + unsigned int lp =3D (hptep->r >> LP_SHIFT) & ((1 << LP_BITS) - 1);
>>> +
>>> + penc =3D 0;
>>> + for (i =3D 0; i < MMU_PAGE_COUNT; i++) {
>>> + /* valid entries have a shift value */
>>> + if (!mmu_psize_defs[i].shift)
>>> + continue;
>>> +
>>> + /* encoding bits per actual page size */
>>> + shift =3D mmu_psize_defs[i].shift - 11;
>>> + if (shift > 9)
>>> + shift =3D 9;
>>> + mask =3D (1 << shift) - 1;
>>> + if ((lp & mask) =3D=3D mmu_psize_defs[psize].penc[i])
>>> + return i;
>>> + }
>>> + return -1;
>>> +}
>>
>> This doesn't look right to me. First, it's not clear what the 11 and
>> 9 refer to, and I think the 9 should be LP_BITS (i.e. 8). Secondly,
>> the mask for the comparison needs to depend on the actual page size
>> not the base page size.
>
> How about the below. I am yet to test this in user space.=20
I needed to special case 4K case. This seems to work fine with the test.
static inline int hpte_actual_psize(struct hash_pte *hptep, int psize)
{
unsigned int mask;
int i, penc, shift;
/* Look at the 8 bit LP value */
unsigned int lp =3D (hptep->r >> LP_SHIFT) & ((1 << LP_BITS) - 1);
/* First check if it is large page */
if (!(hptep->v & HPTE_V_LARGE))
return MMU_PAGE_4K;
penc =3D 0;
for (i =3D 1; i < MMU_PAGE_COUNT; i++) {
/* valid entries have a shift value */
if (!mmu_psize_defs[i].shift)
continue;
/*
* encoding bits per actual page size
* PTE LP actual page size
* rrrr rrrz =E2=89=A58KB
* rrrr rrzz =E2=89=A516KB
* rrrr rzzz =E2=89=A532KB
* rrrr zzzz =E2=89=A564KB
* .......
*/
shift =3D mmu_psize_defs[i].shift -
mmu_psize_defs[MMU_PAGE_4K].shift;
if (shift > LP_BITS)
shift =3D LP_BITS;
mask =3D (1 << shift) - 1;
if ((lp & mask) =3D=3D mmu_psize_defs[psize].penc[i])
return i;
}
return -1;
}
next prev parent reply other threads:[~2013-03-04 18:11 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-26 8:04 [PATCH -V1 00/24] THP support for PPC64 Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 01/24] powerpc: Use signed formatting when printing error Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 02/24] powerpc: Save DAR and DSISR in pt_regs on MCE Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 03/24] powerpc: Don't hard code the size of pte page Aneesh Kumar K.V
2013-02-27 23:09 ` Paul Mackerras
2013-02-26 8:04 ` [PATCH -V1 04/24] powerpc: Reduce the PTE_INDEX_SIZE Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 05/24] powerpc: Move the pte free routines from common header Aneesh Kumar K.V
2013-02-28 8:36 ` Paul Mackerras
2013-02-26 8:04 ` [PATCH -V1 06/24] powerpc: Reduce PTE table memory wastage Aneesh Kumar K.V
2013-03-04 4:58 ` Paul Mackerras
2013-03-04 10:58 ` Aneesh Kumar K.V
2013-03-04 23:36 ` Benjamin Herrenschmidt
2013-03-06 4:01 ` Aneesh Kumar K.V
2013-03-05 2:12 ` Paul Mackerras
2013-03-06 4:08 ` Aneesh Kumar K.V
2013-03-06 5:03 ` Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 07/24] powerpc: Add size argument to pgtable_cache_add Aneesh Kumar K.V
2013-03-04 5:13 ` Paul Mackerras
2013-03-04 11:02 ` Aneesh Kumar K.V
2013-03-05 1:50 ` Paul Mackerras
2013-03-06 4:23 ` Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 08/24] powerpc: Use encode avpn where we need only avpn values Aneesh Kumar K.V
2013-03-04 5:15 ` Paul Mackerras
2013-02-26 8:04 ` [PATCH -V1 09/24] powerpc: Decode the pte-lp-encoding bits correctly Aneesh Kumar K.V
2013-03-04 5:48 ` Paul Mackerras
2013-03-04 11:41 ` Aneesh Kumar K.V
2013-03-05 2:02 ` Paul Mackerras
2013-03-06 4:30 ` Aneesh Kumar K.V
2013-03-04 11:52 ` Aneesh Kumar K.V
2013-03-04 18:11 ` Aneesh Kumar K.V [this message]
2013-02-26 8:05 ` [PATCH -V1 10/24] powerpc: Return all the valid pte ecndoing in KVM_PPC_GET_SMMU_INFO ioctl Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 11/24] powerpc: Update tlbie/tlbiel as per ISA doc Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 12/24] powerpc: print both base and actual page size on hash failure Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 13/24] powerpc: Print page size info during boot Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 14/24] powerpc: Fix hpte_decode to use the correct decoding for page sizes Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 15/24] mm/THP: HPAGE_SHIFT is not a #define on some arch Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 16/24] mm/THP: Add pmd args to pgtable deposit and withdraw APIs Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 17/24] mm/THP: withdraw the pgtable after pmdp related operations Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 18/24] powerpc/THP: Implement transparent huge pages for ppc64 Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 19/24] powerpc/THP: Differentiate THP PMD entries from HUGETLB PMD entries Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 20/24] powerpc/THP: Add code to handle HPTE faults for large pages Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 21/24] powerpc: Handle huge page in perf callchain Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 22/24] powerpc/THP: hypervisor require few WIMG bit set Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 23/24] powerpc/THP: get_user_pages_fast changes Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 24/24] powerpc/THP: Enable THP on PPC64 Aneesh Kumar K.V
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