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[200.236.245.17]) by smtp.gmail.com with ESMTPSA id z1sm244737qkl.74.2020.07.01.17.28.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jul 2020 17:28:45 -0700 (PDT) Message-ID: <8f4c405363e4cd2a5a113f2a9a3f11a575d2947a.camel@gmail.com> Subject: Re: [PATCH v2 2/6] powerpc/pseries/iommu: Update call to ibm,query-pe-dma-windows From: Leonardo Bras To: Alexey Kardashevskiy , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras , Thiago Jung Bauermann , Ram Pai Date: Wed, 01 Jul 2020 21:28:40 -0300 In-Reply-To: <47ad4907-5f63-56e1-2985-a7a7f4d0ba35@ozlabs.ru> References: <20200624062411.367796-1-leobras.c@gmail.com> <20200624062411.367796-3-leobras.c@gmail.com> <5411e8a1-02a3-1287-40bf-ccc9db7a4f88@ozlabs.ru> <47ad4907-5f63-56e1-2985-a7a7f4d0ba35@ozlabs.ru> Organization: IBM Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.34.4 (3.34.4-1.fc31) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, 2020-07-02 at 10:18 +1000, Alexey Kardashevskiy wrote: > > On 02/07/2020 00:04, Leonardo Bras wrote: > > On Wed, 2020-07-01 at 18:17 +1000, Alexey Kardashevskiy wrote: > > > > +#define DDW_EXT_SIZE 0 > > > > +#define DDW_EXT_RESET_DMA_WIN 1 > > > > +#define DDW_EXT_QUERY_OUT_SIZE 2 > > > > > > #define DDW_EXT_LAST (DDW_EXT_QUERY_OUT_SIZE + 1) > > > ... > > > > > > > > > > + > > > > static struct iommu_table_group *iommu_pseries_alloc_group(int node) > > > > { > > > > struct iommu_table_group *table_group; > > > > @@ -339,7 +343,7 @@ struct direct_window { > > > > /* Dynamic DMA Window support */ > > > > struct ddw_query_response { > > > > u32 windows_available; > > > > - u32 largest_available_block; > > > > + u64 largest_available_block; > > > > u32 page_size; > > > > u32 migration_capable; > > > > }; > > > > @@ -875,13 +879,29 @@ static int find_existing_ddw_windows(void) > > > > machine_arch_initcall(pseries, find_existing_ddw_windows); > > > > > > > > static int query_ddw(struct pci_dev *dev, const u32 *ddw_avail, > > > > - struct ddw_query_response *query) > > > > + struct ddw_query_response *query, > > > > + struct device_node *parent) > > > > { > > > > struct device_node *dn; > > > > struct pci_dn *pdn; > > > > - u32 cfg_addr; > > > > + u32 cfg_addr, query_out[5], ddw_ext[DDW_EXT_QUERY_OUT_SIZE + 1]; > > > > > > ... and use DDW_EXT_LAST here. > > > > Because of the growing nature of ddw-extensions, I intentionally let > > this be (DDW_EXT_QUERY_OUT_SIZE + 1). If we create a DDW_EXT_LAST, it > > will be incremented in the future if more extensions come to exist. > > > > I mean, I previously saw no reason for allocating space for extensions > > after the desired one, as they won't be used here. > > Ah, my bad, you're right. > > > > > > > > > u64 buid; > > > > - int ret; > > > > + int ret, out_sz; > > > > + > > > > + /* > > > > + * From LoPAR level 2.8, "ibm,ddw-extensions" index 3 can rule how many > > > > + * output parameters ibm,query-pe-dma-windows will have, ranging from > > > > + * 5 to 6. > > > > + */ > > > > + > > > > + ret = of_property_read_u32_array(parent, "ibm,ddw-extensions", > > > > + &ddw_ext[0], > > > > + DDW_EXT_QUERY_OUT_SIZE + 1); > > > > In this case, I made sure not to cross (DDW_EXT_QUERY_OUT_SIZE + 1) > > while reading the extensions from the property. > > > > What do you think about it? > > I think you want something like: > > static inline int ddw_read_ext(const struct device_node *np, int extnum, > u32 *ret) > { > retun of_property_read_u32_index(np, "ibm,ddw-extensions", extnum + 1, ret); > } > > These "+1"'s all over the place are confusing. That's a great idea! I was not aware it was possible to read a single value[index] directly from the property, but it makes total sense to use it. Thank you!