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From: Kumar Gala <galak@kernel.crashing.org>
To: Li Tony <Tony.Li@freescale.com>
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Subject: Re: [PATCH 2/2] powerpc: Add IPIC MSI support
Date: Fri, 14 Dec 2007 02:52:22 -0600
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	<97EB3576-6952-4F36-A243-4EBF981A117F@kernel.crashing.org>
	<995B09A8299C2C44B59866F6391D2635DB0633@zch01exm21.fsl.freescale.net>
Cc: linuxppc-dev list <linuxppc-dev@ozlabs.org>,
	Phillips Kim <Kim.Phillips@freescale.com>, Olof Johansson <olof@lixom.net>,
	Jin Zhengxiong <Jason.Jin@freescale.com>
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On Dec 14, 2007, at 2:47 AM, Li Tony wrote:

>
> Hi,
>
> I think it is possible to make common code to support both IPIC and =20=

> MPIC.
> Currently, the MPIC has already implemented MSI which is different =20
> from IPIC and embedded into the mpic code body.
> If want to unifiy MSI code, we need to remove the current MPIC MSI =20
> implementation.

The MPIC is going to have to support several MSI styles (IBM/U3, =20
PaSemi, and FSL) since we all seem to handle it differently.

> Micheal, what is your opinion ??
>
> Jin is working on 86xx msi now.

What PCIe cards are you using to test MSIs?

- k

>> -----Original Message-----
>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>> Sent: 2007=C4=EA12=D4=C214=C8=D5 13:45
>> To: Li Tony
>> Cc: Phillips Kim; michael@ellerman.id.au; linuxppc-dev
>> Subject: Re: [PATCH 2/2] powerpc: Add IPIC MSI support
>>
>>
>> On Dec 4, 2007, at 4:39 AM, Li Li wrote:
>>
>>> Modified based on discussion on list.
>>>
>>> 1. Adopt virq_to_hw routine
>>> 2. Correct a legacy bug
>>>
>>> Implements the IPIC MSI as two level interrupt controller.
>>>
>>> Signed-off-by: Tony Li <tony.li@freescale.com>
>>
>> Tony, have you looked at the 85xx/86xx PCIe MSI mechanism?
>> The 2nd level PIC handling seems like its pretty similar
>> between IPIC and MPIC.  Would like to see if we could somehow
>> make the code common for to handle MSIs from both?
>>
>> - k
>>