linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v3 1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode
@ 2018-04-25 11:08 Philippe Bergheaud
  2018-04-25 11:08 ` [PATCH v3 2/2] cxl: Report the tunneled operations status Philippe Bergheaud
  2018-05-11 11:25 ` [PATCH v3 1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode Frederic Barrat
  0 siblings, 2 replies; 4+ messages in thread
From: Philippe Bergheaud @ 2018-04-25 11:08 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: fbarrat, clombard, benh, Philippe Bergheaud

Skiboot used to set the default Tunnel BAR register value when capi mode
was enabled. This approach was ok for the cxl driver, but prevented other
drivers from choosing different values.

Skiboot versions > 5.11 will not set the default value any longer. This
patch modifies the cxl driver to set/reset the Tunnel BAR register when
entering/exiting the cxl mode, with pnv_pci_set_tunnel_bar().

Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com>
Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
---
v2: Restrict tunnel bar setting to power9.
    Do not fail cxl_configure_adapter() on tunnel bar setting error.
    Log an info message instead, and continue configuring capi mode.

v3: No change.
---
 drivers/misc/cxl/pci.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 83f1d08058fc..355c789406f7 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1742,6 +1742,10 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
 	/* Required for devices using CAPP DMA mode, harmless for others */
 	pci_set_master(dev);
 
+	if (cxl_is_power9())
+		if (pnv_pci_set_tunnel_bar(dev, 0x00020000E0000000ull, 1))
+			dev_info(&dev->dev, "Tunneled operations unsupported\n");
+
 	if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
 		goto err;
 
@@ -1768,6 +1772,8 @@ static void cxl_deconfigure_adapter(struct cxl *adapter)
 {
 	struct pci_dev *pdev = to_pci_dev(adapter->dev.parent);
 
+	if (cxl_is_power9())
+		pnv_pci_set_tunnel_bar(pdev, 0x00020000E0000000ull, 0);
 	cxl_native_release_psl_err_irq(adapter);
 	cxl_unmap_adapter_regs(adapter);
 
-- 
2.16.3

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH v3 2/2] cxl: Report the tunneled operations status
  2018-04-25 11:08 [PATCH v3 1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode Philippe Bergheaud
@ 2018-04-25 11:08 ` Philippe Bergheaud
  2018-05-11 11:26   ` Frederic Barrat
  2018-05-11 11:25 ` [PATCH v3 1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode Frederic Barrat
  1 sibling, 1 reply; 4+ messages in thread
From: Philippe Bergheaud @ 2018-04-25 11:08 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: fbarrat, clombard, benh, Philippe Bergheaud

Failure to synchronize the tunneled operations does not prevent
the initialization of the cxl card. This patch reports the tunneled
operations status via /sys.

Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com>
---
v3: Added this patch to report the tunneled operations status.
---
 drivers/misc/cxl/cxl.h   |  1 +
 drivers/misc/cxl/pci.c   |  7 ++++++-
 drivers/misc/cxl/sysfs.c | 10 ++++++++++
 3 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index a4c9c8297a6d..918d4fb742d1 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -717,6 +717,7 @@ struct cxl {
 	bool perst_select_user;
 	bool perst_same_image;
 	bool psl_timebase_synced;
+	bool tunneled_ops_supported;
 
 	/*
 	 * number of contexts mapped on to this card. Possible values are:
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 355c789406f7..008f50a0c465 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1742,9 +1742,14 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
 	/* Required for devices using CAPP DMA mode, harmless for others */
 	pci_set_master(dev);
 
-	if (cxl_is_power9())
+	adapter->tunneled_ops_supported = false;
+
+	if (cxl_is_power9()) {
 		if (pnv_pci_set_tunnel_bar(dev, 0x00020000E0000000ull, 1))
 			dev_info(&dev->dev, "Tunneled operations unsupported\n");
+		else
+			adapter->tunneled_ops_supported = true;
+	}
 
 	if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
 		goto err;
diff --git a/drivers/misc/cxl/sysfs.c b/drivers/misc/cxl/sysfs.c
index 95285b7f636f..4b5a4c5d3c01 100644
--- a/drivers/misc/cxl/sysfs.c
+++ b/drivers/misc/cxl/sysfs.c
@@ -78,6 +78,15 @@ static ssize_t psl_timebase_synced_show(struct device *device,
 	return scnprintf(buf, PAGE_SIZE, "%i\n", adapter->psl_timebase_synced);
 }
 
+static ssize_t tunneled_ops_supported_show(struct device *device,
+					struct device_attribute *attr,
+					char *buf)
+{
+	struct cxl *adapter = to_cxl_adapter(device);
+
+	return scnprintf(buf, PAGE_SIZE, "%i\n", adapter->tunneled_ops_supported);
+}
+
 static ssize_t reset_adapter_store(struct device *device,
 				   struct device_attribute *attr,
 				   const char *buf, size_t count)
@@ -183,6 +192,7 @@ static struct device_attribute adapter_attrs[] = {
 	__ATTR_RO(base_image),
 	__ATTR_RO(image_loaded),
 	__ATTR_RO(psl_timebase_synced),
+	__ATTR_RO(tunneled_ops_supported),
 	__ATTR_RW(load_image_on_perst),
 	__ATTR_RW(perst_reloads_same_image),
 	__ATTR(reset, S_IWUSR, NULL, reset_adapter_store),
-- 
2.16.3

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v3 1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode
  2018-04-25 11:08 [PATCH v3 1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode Philippe Bergheaud
  2018-04-25 11:08 ` [PATCH v3 2/2] cxl: Report the tunneled operations status Philippe Bergheaud
@ 2018-05-11 11:25 ` Frederic Barrat
  1 sibling, 0 replies; 4+ messages in thread
From: Frederic Barrat @ 2018-05-11 11:25 UTC (permalink / raw)
  To: Philippe Bergheaud, linuxppc-dev; +Cc: clombard, benh



Le 25/04/2018 à 13:08, Philippe Bergheaud a écrit :
> Skiboot used to set the default Tunnel BAR register value when capi mode
> was enabled. This approach was ok for the cxl driver, but prevented other
> drivers from choosing different values.
> 
> Skiboot versions > 5.11 will not set the default value any longer. This
> patch modifies the cxl driver to set/reset the Tunnel BAR register when
> entering/exiting the cxl mode, with pnv_pci_set_tunnel_bar().
> 
> Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com>
> Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
> ---

ok, so that should work with old skiboot (since we are re-writing the 
value already set) and new skiboot. Thanks!

Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>


> v2: Restrict tunnel bar setting to power9.
>      Do not fail cxl_configure_adapter() on tunnel bar setting error.
>      Log an info message instead, and continue configuring capi mode.
> 
> v3: No change.
> ---
>   drivers/misc/cxl/pci.c | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
> index 83f1d08058fc..355c789406f7 100644
> --- a/drivers/misc/cxl/pci.c
> +++ b/drivers/misc/cxl/pci.c
> @@ -1742,6 +1742,10 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
>   	/* Required for devices using CAPP DMA mode, harmless for others */
>   	pci_set_master(dev);
>   
> +	if (cxl_is_power9())
> +		if (pnv_pci_set_tunnel_bar(dev, 0x00020000E0000000ull, 1))
> +			dev_info(&dev->dev, "Tunneled operations unsupported\n");
> +
>   	if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
>   		goto err;
>   
> @@ -1768,6 +1772,8 @@ static void cxl_deconfigure_adapter(struct cxl *adapter)
>   {
>   	struct pci_dev *pdev = to_pci_dev(adapter->dev.parent);
>   
> +	if (cxl_is_power9())
> +		pnv_pci_set_tunnel_bar(pdev, 0x00020000E0000000ull, 0);
>   	cxl_native_release_psl_err_irq(adapter);
>   	cxl_unmap_adapter_regs(adapter);
>   
> 

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v3 2/2] cxl: Report the tunneled operations status
  2018-04-25 11:08 ` [PATCH v3 2/2] cxl: Report the tunneled operations status Philippe Bergheaud
@ 2018-05-11 11:26   ` Frederic Barrat
  0 siblings, 0 replies; 4+ messages in thread
From: Frederic Barrat @ 2018-05-11 11:26 UTC (permalink / raw)
  To: Philippe Bergheaud, linuxppc-dev; +Cc: clombard, benh



Le 25/04/2018 à 13:08, Philippe Bergheaud a écrit :
> Failure to synchronize the tunneled operations does not prevent
> the initialization of the cxl card. This patch reports the tunneled
> operations status via /sys.
> 
> Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com>
> ---

Good idea, but you'll have to also edit
Documentation/ABI/testing/sysfs-class-cxl
to describe the new sysfs entry.

   Fred


> v3: Added this patch to report the tunneled operations status.
> ---
>   drivers/misc/cxl/cxl.h   |  1 +
>   drivers/misc/cxl/pci.c   |  7 ++++++-
>   drivers/misc/cxl/sysfs.c | 10 ++++++++++
>   3 files changed, 17 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
> index a4c9c8297a6d..918d4fb742d1 100644
> --- a/drivers/misc/cxl/cxl.h
> +++ b/drivers/misc/cxl/cxl.h
> @@ -717,6 +717,7 @@ struct cxl {
>   	bool perst_select_user;
>   	bool perst_same_image;
>   	bool psl_timebase_synced;
> +	bool tunneled_ops_supported;
>   
>   	/*
>   	 * number of contexts mapped on to this card. Possible values are:
> diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
> index 355c789406f7..008f50a0c465 100644
> --- a/drivers/misc/cxl/pci.c
> +++ b/drivers/misc/cxl/pci.c
> @@ -1742,9 +1742,14 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
>   	/* Required for devices using CAPP DMA mode, harmless for others */
>   	pci_set_master(dev);
>   
> -	if (cxl_is_power9())
> +	adapter->tunneled_ops_supported = false;
> +
> +	if (cxl_is_power9()) {
>   		if (pnv_pci_set_tunnel_bar(dev, 0x00020000E0000000ull, 1))
>   			dev_info(&dev->dev, "Tunneled operations unsupported\n");
> +		else
> +			adapter->tunneled_ops_supported = true;
> +	}
>   
>   	if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
>   		goto err;
> diff --git a/drivers/misc/cxl/sysfs.c b/drivers/misc/cxl/sysfs.c
> index 95285b7f636f..4b5a4c5d3c01 100644
> --- a/drivers/misc/cxl/sysfs.c
> +++ b/drivers/misc/cxl/sysfs.c
> @@ -78,6 +78,15 @@ static ssize_t psl_timebase_synced_show(struct device *device,
>   	return scnprintf(buf, PAGE_SIZE, "%i\n", adapter->psl_timebase_synced);
>   }
>   
> +static ssize_t tunneled_ops_supported_show(struct device *device,
> +					struct device_attribute *attr,
> +					char *buf)
> +{
> +	struct cxl *adapter = to_cxl_adapter(device);
> +
> +	return scnprintf(buf, PAGE_SIZE, "%i\n", adapter->tunneled_ops_supported);
> +}
> +
>   static ssize_t reset_adapter_store(struct device *device,
>   				   struct device_attribute *attr,
>   				   const char *buf, size_t count)
> @@ -183,6 +192,7 @@ static struct device_attribute adapter_attrs[] = {
>   	__ATTR_RO(base_image),
>   	__ATTR_RO(image_loaded),
>   	__ATTR_RO(psl_timebase_synced),
> +	__ATTR_RO(tunneled_ops_supported),
>   	__ATTR_RW(load_image_on_perst),
>   	__ATTR_RW(perst_reloads_same_image),
>   	__ATTR(reset, S_IWUSR, NULL, reset_adapter_store),
> 

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-05-11 11:26 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-04-25 11:08 [PATCH v3 1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode Philippe Bergheaud
2018-04-25 11:08 ` [PATCH v3 2/2] cxl: Report the tunneled operations status Philippe Bergheaud
2018-05-11 11:26   ` Frederic Barrat
2018-05-11 11:25 ` [PATCH v3 1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode Frederic Barrat

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).