From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ti-out-0910.google.com (ti-out-0910.google.com [209.85.142.184]) by ozlabs.org (Postfix) with ESMTP id B3648DDEEE for ; Fri, 30 May 2008 11:14:51 +1000 (EST) Received: by ti-out-0910.google.com with SMTP id w7so2792940tib.13 for ; Thu, 29 May 2008 18:14:50 -0700 (PDT) Message-ID: <966933c00805291814s12439a96q57fabe77ff1139ec@mail.gmail.com> Date: Fri, 30 May 2008 09:14:50 +0800 From: "John Zhou" To: linuxppc-embedded@ozlabs.org Subject: Question on PowerPC's JTAG instruction MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_5300_13445732.1212110090279" List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , ------=_Part_5300_13445732.1212110090279 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi, We want to design a tool to speed up our hardware diagnostics via JTAG port. So we have question to ask for your help: 1. How do we access PowerPC's internal GPRs and SPRs etc. via JTAG instruction? We'v gone through IEEE.1149.1. There are no standard JTAG instruction to access CPU's data bus, including internal or external data bus. Do we must need private JTAG instruction to access CPU's internal resource? if it is, could you share the documents with us? 2. For 'BSDL' usage, you know, we have many components on one board and much more signals are processed specically. So, how to integrate PowerPC's BSDL with other components' 'BSDL'? Could you give us any hints on it? or any document is also welcome! Your any help is appreciated! John Zhou ------=_Part_5300_13445732.1212110090279 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi,

We want to design a tool to speed up our hardware diagnostics via JTAG port. 
 
So we have question to ask for your help:
 
1. How do we access PowerPC's internal GPRs and SPRs etc. via JTAG instruction? 
 
We'v gone through IEEE.1149.1.   There are no standard JTAG instruction to access CPU's data bus, including internal or external data bus. Do we must need private JTAG instruction to access CPU's internal resource? if it is, could you share the documents with us?
 
2. For 'BSDL' usage, you know, we have many components on one board and much more signals are processed specically. So, how to integrate PowerPC's BSDL with other components' 'BSDL'?  Could you give us any hints on it? or any document is also welcome!
 
Your any help is appreciated!

John Zhou


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