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Mon, 05 Oct 2026 13:40:22 -0700 (PDT) X-Received: by 2002:a05:651c:1602:b0:3a5:b1f7:a7bf with SMTP id 38308e7fff4ca-3a974f64065mr22350491fa.21.1791232821598; Mon, 05 Oct 2026 13:40:21 -0700 (PDT) Received: from [192.168.2.110] ([142.172.30.162]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-3a87e28b131sm45437081fa.1.2026.10.05.13.40.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 05 Oct 2026 13:40:21 -0700 (PDT) Message-ID: <9adb6aaf-6e50-4ab0-a021-2529807dff02@redhat.com> Date: Mon, 5 Oct 2026 16:40:14 -0400 X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 09/14] powerpc: move has_transparent_hugepage() out of THP guard To: "Christophe Leroy (CS GROUP)" , "David Hildenbrand (Arm)" , linux-kernel@vger.kernel.org, linux-mm@kvack.org, baolin.wang@linux.alibaba.com, ziy@nvidia.com, lance.yang@linux.dev, "linuxppc-dev@lists.ozlabs.org" Cc: corbet@lwn.net, tsbogend@alpha.franken.de, maddy@linux.ibm.com, mpe@ellerman.id.au, agordeev@linux.ibm.com, gerald.schaefer@linux.ibm.com, hca@linux.ibm.com, gor@linux.ibm.com, x86@kernel.org, tglx@kernel.org, mingo@redhat.com, bp@alien8.de, hughd@google.com, dave.hansen@linux.intel.com, djbw@kernel.org, vishal.l.verma@intel.com, dave.jiang@intel.com, akpm@linux-foundation.org, yintirui@huawei.com, dev.jain@arm.com, usama.arif@linux.dev References: <05a71b6011a6eab7b096f262485fcb8b4987976f.1789695931.git.luizcap@redhat.com> <25bb02df-a795-4e48-9de6-99f1ca799176@redhat.com> <802564f8-1376-451e-8308-6f98d1efb099@kernel.org> From: Luiz Capitulino In-Reply-To: <802564f8-1376-451e-8308-6f98d1efb099@kernel.org> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: k_D8V7XngBX2qaaHZNC4yXPLEvKllXGMW4ncZs6GedE_1791232822 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 10/5/26 12:52 AM, Christophe Leroy (CS GROUP) wrote: > Hi, > > Don't forget when you address powerpc architecture. Will do. > > Le 03/10/2026 à 17:44, Luiz Capitulino a écrit : >> >> >> On 10/2/26 3:28 PM, David Hildenbrand (Arm) wrote: >>> On 9/18/26 03:45, Luiz Capitulino wrote: >>>> A future commit will introduce a kernel API to allow for checking if the >>>> CPU supports PMD-sized pages. This API will be based on the >>>> has_transparent_hugepage() implementation but will be orthogonal to THP >>>> and therefore must work when CONFIG_TRANSPARENT_HUGEPAGE=n. >>>> >>>> Move its definition out of the THP guard. >>>> >>>> Signed-off-by: Luiz Capitulino >>>> --- >>>> arch/powerpc/include/asm/book3s/64/hash-4k.h | 2 +- >>>> arch/powerpc/include/asm/book3s/64/hash-64k.h | 2 +- >>>> arch/powerpc/include/asm/book3s/64/pgtable.h | 18 +++++++++--------- >>>> arch/powerpc/include/asm/book3s/64/radix.h | 14 +++++++------- >>>> arch/powerpc/mm/book3s64/hash_pgtable.c | 4 ++-- >>>> 5 files changed, 20 insertions(+), 20 deletions(-) >>>> >>>> diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/ powerpc/include/asm/book3s/64/hash-4k.h >>>> index 8e5bd9902bed..79511e6abfca 100644 >>>> --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h >>>> +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h >>>> @@ -165,9 +165,9 @@ extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, >>>> extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); >>>> extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm, >>>> unsigned long addr, pmd_t *pmdp); >>>> -extern int hash__has_transparent_hugepage(void); >>>> #endif >>>> +extern int hash__has_transparent_hugepage(void); >>>> #endif /* !__ASSEMBLER__ */ >>>> #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */ >>>> diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/ powerpc/include/asm/book3s/64/hash-64k.h >>>> index 7deb3a66890b..a4a44a112ff9 100644 >>>> --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h >>>> +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h >>>> @@ -278,9 +278,9 @@ extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, >>>> extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); >>>> extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm, >>>> unsigned long addr, pmd_t *pmdp); >>>> -extern int hash__has_transparent_hugepage(void); >>> >>> Without some of these helpers in place, I assume actually using PMD leafs >>> without THP would require some more work. (which is not the goal of this series, >>> just asking). >> >> Yes, you're right. >> >>> I do wonder whether the architecture should instead simply say "not supported" >>> if !CONFIG_TRANSPARENT_HUGEPAGE? >>> >>> That should still enable your series: using mTHP without PMD support. >> >> Yes, it would. However, I think this introduces an inconsistency. > > powerpc has two types of MMU (HASH and RADIX) with different page layout. MMU type is selected at boottime based on the capabilities of the CPU. For transparent page you have: > > static inline int has_transparent_hugepage(void) > { > if (radix_enabled()) > return radix__has_transparent_hugepage(); > return hash__has_transparent_hugepage(); > } Right and, unless I'm misunderstanding your comment, this supports my position that the new arch_has_pmd_leaves() API is all about reporting a hardware capability and not tied to THP support. > >> >> In in its current form, arch_has_pmd_leaves() should always report a hardware >> capability. This is true even for the default case where >> arch_has_pmd_leaves() defaults to >> IS_ENABLED(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE) in the assumption that >> archs supporting PMD-sized pages by default will have this config >> enabled. >> >> Your suggestion will change this and for some archs >> arch_has_pmd_leaves() may have different behavior depending on the user >> configuration. Additionally, I intended to decouple the base API >> implementation from THP. >> >> If you feel strongly about this I can implement your suggestion, but I'd >> still vote for keeping the API about consistently reporting the hardware >> capability. Even if the only user is THP code today, new use cases can >> be added incrementally. >> >>> >>> [...] >>> >>>> -static inline int radix__has_transparent_hugepage(void) >>>> +static inline int radix__has_transparent_pud_hugepage(void) >>>> { >>>> - /* For radix 2M at PMD level means thp */ >>>> - if (mmu_psize_defs[MMU_PAGE_2M].shift == PMD_SHIFT) >>>> + /* For radix 1G at PUD level means pud hugepage support */ >>>> + if (mmu_psize_defs[MMU_PAGE_1G].shift == PUD_SHIFT) >>>> return 1; >>>> return 0; >>>> } >>>> +#endif >>>> -static inline int radix__has_transparent_pud_hugepage(void) >>>> +static inline int radix__has_transparent_hugepage(void) >>>> { >>>> - /* For radix 1G at PUD level means pud hugepage support */ >>>> - if (mmu_psize_defs[MMU_PAGE_1G].shift == PUD_SHIFT) >>>> + /* For radix 2M at PMD level means thp */ >>>> + if (mmu_psize_defs[MMU_PAGE_2M].shift == PMD_SHIFT) >>>> return 1; >>>> return 0; >>>> } >>> >>> You are swapping both implementations, which might create some unnecessary churn >>> I think. >> >> I suspect this was done by git diff as I just moved the functions, but >> I'll take a better look. >> >