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Wysocki" , Robert Richter Cc: linux-acpi@vger.kernel.org, linux-cxl@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Alejandro Lucero , Alison Schofield , Ankit Agrawal , Ard Biesheuvel , Ben Cheatham , Borislav Petkov , Breno Leitao , Davidlohr Bueso , "Fabio M . De Francesco" , Gregory Price , Hanjun Guo , Jonathan Corbet , Kees Cook , Kuppuswamy Sathyanarayanan , Li Ming , Mahesh J Salgaonkar , Mauro Carvalho Chehab , Oliver O'Halloran , Shiju Jose , Shuah Khan , Shuai Xue , Smita Koralahalli , Tony Luck , Vishal Verma References: <20260717222706.3540281-1-terry.bowman@amd.com> <20260717222706.3540281-2-terry.bowman@amd.com> Content-Language: en-US From: Dave Jiang In-Reply-To: <20260717222706.3540281-2-terry.bowman@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 7/17/26 3:26 PM, Terry Bowman wrote: > cxl_rch_get_aer_severity() classifies RCH Downstream Port uncorrectable > errors as fatal or non-fatal by ANDing uncorrectable status with > PCI_ERR_ROOT_FATAL_RCV. This is wrong because PCI_ERR_ROOT_FATAL_RCV is a > Root Error Status register bit (bit 6), not a severity bit. ANDing it > against uncorrectable status tests a reserved bit and produces incorrect > severity classification. > > Fix by ANDing the unmasked uncor_status against uncor_severity. Per > PCIe Base Spec r6.0 Section 7.8.4.4, each bit in the Uncorrectable > Error Severity register indicates whether the corresponding error is > fatal (1) or non-fatal (0). > > Fixes: 6ac07883dbb5 ("cxl/pci: Add RCH downstream port error logging") > Cc: stable@vger.kernel.org > Signed-off-by: Terry Bowman Reviewed-by: Dave Jiang This can be picked up ahead looks like? > > --- > > Changes in v17 -> v18: > - New patch. > --- > drivers/cxl/core/ras_rch.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/cxl/core/ras_rch.c b/drivers/cxl/core/ras_rch.c > index 0a8b3b9b63884..44b335d560708 100644 > --- a/drivers/cxl/core/ras_rch.c > +++ b/drivers/cxl/core/ras_rch.c > @@ -80,7 +80,8 @@ static bool cxl_rch_get_aer_severity(struct aer_capability_regs *aer_regs, > int *severity) > { > if (aer_regs->uncor_status & ~aer_regs->uncor_mask) { > - if (aer_regs->uncor_status & PCI_ERR_ROOT_FATAL_RCV) > + if ((aer_regs->uncor_status & ~aer_regs->uncor_mask) & > + aer_regs->uncor_severity) > *severity = AER_FATAL; > else > *severity = AER_NONFATAL;