Re: MPC5200 PCI interrupt routing

["Jon Smirl" <jonsmirl@gmail.com>]

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On Thu, Sep 25, 2008 at 12:57 PM, Grant Likely
<grant.likely@secretlab.ca> wrote:
> On Thu, Sep 25, 2008 at 09:51:14AM +0200, Juergen Beisert wrote:
>> Benjamin,
>>
>> On Mittwoch, 24. September 2008, Benjamin Herrenschmidt wrote:
>> > On Wed, 2008-09-24 at 12:15 -0600, Grant Likely wrote:
>> > > On Wed, Sep 24, 2008 at 05:16:34PM +0200, Juergen Beisert wrote:
>> > > > On Dienstag, 23. September 2008, Juergen Beisert wrote:
>> > > > > What Kernel do you run on your target? On my hardware a 2.6.23 still
>> > > > > work as expected, but a 2.6.26 fails all the time.
>> > > >
>> > > > One should enable the internal USB clock. If done, it works... In
>> > > > 2.6.23 is was done in mpc52xx_common.c. It was removed in 2.6.24.
>> > >
>> > > It was removed because some 5200 platform do not use USB and should not
>> > > enable the internal clock.  In general, it is not the kernel's job to
>> > > configure clocking and pin usage on the chip.  Instead, it should be set
>> > > correctly at power up by U-Boot.

I got the attached diagram from Freescale on how to program the
divider. It's not in the user manual.

Freescale is recommending a 33.333Mhz crystal for the mpc5200 now. If
you use 33.3333Mhz you won't be able to set a 48Mhz internal clock.
Closest you can get is 48.4848Mhz.  Sticking with a 33Mhz crystal
allow an accurate 48Mhz clock. Clocking USB at the wrong clock rate
will make some devices not function or get errors.

The new mpc5200 datasheet has removed the option of using a 16x
multiplier on a 33Mhz crystal and running the core at 528Mhz. The new
datasheet only allows up to 400Mhz for the core. Anyone know what is
going on?

-- 
Jon Smirl
jonsmirl@gmail.com

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