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From: "Kuppuswamy, Sathyanarayanan" <sathyanarayanan.kuppuswamy@linux.intel.com>
To: Jon Derrick <jonathan.derrick@intel.com>,
	Bjorn Helgaas <helgaas@kernel.org>
Cc: Rajat Jain <rajatja@google.com>,
	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	Frederick Lawler <fred@fredlawl.com>,
	Sam Bobroff <sbobroff@linux.ibm.com>,
	linux-pci@vger.kernel.org, Olof Johansson <olof@lixom.net>,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	"Patel, Mayurkumar" <mayurkumar.patel@intel.com>,
	Oliver O'Halloran <oohall@gmail.com>,
	Keith Busch <kbusch@kernel.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: Re: [PATCH v2 1/2] PCI/AER: Allow Native AER Host Bridges to use AER
Date: Wed, 22 Apr 2020 15:48:20 -0700	[thread overview]
Message-ID: <9f8c2a62-e67d-2869-db11-4644b69815f4@linux.intel.com> (raw)
In-Reply-To: <1587418630-13562-2-git-send-email-jonathan.derrick@intel.com>



On 4/20/20 2:37 PM, Jon Derrick wrote:
> Some platforms have a mix of ports whose capabilities can be negotiated
> by _OSC, and some ports which are not described by ACPI and instead
> managed by Native drivers. The existing Firmware-First HEST model can
> incorrectly tag these Native, Non-ACPI ports as Firmware-First managed
> ports by advertising the HEST Global Flag and matching the type and
> class of the port (aer_hest_parse).
Is there a real use case for mixed mode (one host bridge in FF mode and
another in native)?
> 
> If the port requests Native AER through the Host Bridge's capability
> settings, the AER driver should honor those settings and allow the port
> to bind. This patch changes the definition of Firmware-First to exclude
> ports whose Host Bridges request Native AER.
> 
> Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
> ---
>   drivers/pci/pcie/aer.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index f4274d3..30fbd1f 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -314,6 +314,9 @@ int pcie_aer_get_firmware_first(struct pci_dev *dev)
>   	if (pcie_ports_native)
>   		return 0;
>   
> +	if (pci_find_host_bridge(dev->bus)->native_aer)
> +		return 0;
> +
>   	if (!dev->__aer_firmware_first_valid)
>   		aer_set_firmware_first(dev);
>   	return dev->__aer_firmware_first;
> 

  reply	other threads:[~2020-04-22 22:50 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-20 21:37 [PATCH v2 0/2] Honoring Native AER/DPC Host Bridges Jon Derrick
2020-04-20 21:37 ` [PATCH v2 1/2] PCI/AER: Allow Native AER Host Bridges to use AER Jon Derrick
2020-04-22 22:48   ` Kuppuswamy, Sathyanarayanan [this message]
2020-04-23 15:11     ` Derrick, Jonathan
2020-04-24 23:30   ` Bjorn Helgaas
2020-04-27 16:11     ` Derrick, Jonathan
2020-04-27 22:14       ` Bjorn Helgaas
2020-04-20 21:37 ` [PATCH v2 2/2] PCI/DPC: Allow Native DPC Host Bridges to use DPC Jon Derrick
2020-04-22 22:50   ` Kuppuswamy, Sathyanarayanan
2020-04-23 15:11     ` Derrick, Jonathan
2020-04-25 20:46       ` Kuppuswamy, Sathyanarayanan
2020-04-27 15:15         ` Derrick, Jonathan
2020-04-27 15:43           ` Kuppuswamy, Sathyanarayanan

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