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Message-ID: <9fd2cb24976fc3b4534d7ab6186032ac4e27c9d5.camel@kernel.crashing.org>
Subject: Re: [PATCH 2/2] powerpc/64s/radix: Explicitly flush ERAT with local
 LPID invalidation
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Nicholas Piggin <npiggin@gmail.com>, linuxppc-dev@lists.ozlabs.org
Cc: Paul Mackerras <pmac@au1.ibm.com>
Date: Mon, 27 Aug 2018 18:16:05 +1000
In-Reply-To: <20180827030302.17541-3-npiggin@gmail.com>
References: <20180827030302.17541-1-npiggin@gmail.com>
 <20180827030302.17541-3-npiggin@gmail.com>
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On Mon, 2018-08-27 at 13:03 +1000, Nicholas Piggin wrote:
> Local radix TLB flush operations that operate on congruence classes
> have explicit ERAT flushes for POWER9. The process scoped LPID flush
> did not have a flush, so add it.

Paul, is that an actual bug ? I think the ERAT is flushed on LPID
changes...

> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
>  arch/powerpc/mm/tlb-radix.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
> index fef3e1eb3a19..4e798f33c530 100644
> --- a/arch/powerpc/mm/tlb-radix.c
> +++ b/arch/powerpc/mm/tlb-radix.c
> @@ -366,6 +366,7 @@ static inline void _tlbiel_lpid_guest(unsigned long lpid, unsigned long ric)
>  		__tlbiel_lpid_guest(lpid, set, RIC_FLUSH_TLB);
>  
>  	asm volatile("ptesync": : :"memory");
> +	asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
>  }
>  
>