From: Matevz Langus <matevz.langus@borea.si>
To: Zhao Qiang <qiang.zhao@nxp.com>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] net: wan: fsl_ucc_hdlc: allocate enough MURAM for HDLC PRAM
Date: Mon, 3 Aug 2026 14:58:06 +0200 [thread overview]
Message-ID: <C736AAC7-5345-4B3B-BA33-299ED9566F65@borea.si> (raw)
More MURAM needs to be allocated than just sizeof(struct ucc_hdlc_param).
We have noticed MURAM corruption outside of struct ucc_hdlc_param. It was
caused by QE UCC HDLC microcode. NXP QEIWRM.pdf Rev.9 05/2018 chapter
14.2.2.1 HDLC Parameter RAM says 0x6c-0x100 Reserved.
Even looking into QE UCC HDLC microcode source code reveals it actually
stores data beyond 0x6c.
Tested on LS1043A, T1040 and MPC8569 boards running UCC in HDLC mode on kernel 6.12.
Signed-off-by: Matevz Langus <matevz.langus@borea.si>
---
drivers/net/wan/fsl_ucc_hdlc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/wan/fsl_ucc_hdlc.h b/drivers/net/wan/fsl_ucc_hdlc.h
index 71d5ad0a7b98..e170d3ac9116 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.h
+++ b/drivers/net/wan/fsl_ucc_hdlc.h
@@ -60,6 +60,7 @@ struct ucc_hdlc_param {
__be16 haddr4;
__be16 ts_tmp;
__be16 tmp_mb;
+ __u8 reserved[148];
};
struct ucc_hdlc_private {
-- 2.34.1
next reply other threads:[~2026-08-03 13:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-03 12:58 Matevz Langus [this message]
2026-08-03 14:18 ` [PATCH] net: wan: fsl_ucc_hdlc: allocate enough MURAM for HDLC PRAM Christophe Leroy (CS GROUP)
2026-08-03 14:42 ` Matevz Langus
2026-08-03 15:03 ` Christophe Leroy (CS GROUP)
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