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Thu, 06 Jul 2023 04:07:06 -0700 (PDT) MIME-Version: 1.0 References: <1652963808-14515-1-git-send-email-shengjiu.wang@nxp.com> <20230706084706.bzwsbi3zisx5m5rl@fatal.se> In-Reply-To: <20230706084706.bzwsbi3zisx5m5rl@fatal.se> From: Shengjiu Wang Date: Thu, 6 Jul 2023 19:06:55 +0800 Message-ID: Subject: Re: [PATCH] ASoC: fsl_sai: Enable MCTL_MCLK_EN bit for master mode To: Andreas Henriksson Content-Type: multipart/alternative; boundary="0000000000004cf88e05ffcf84de" X-Mailman-Approved-At: Thu, 06 Jul 2023 23:17:34 +1000 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux-ALSA , Xiubo Li , linuxppc-dev , Shengjiu Wang , Takashi Iwai , Liam Girdwood , Jaroslav Kysela , Nicolin Chen , Mark Brown , =?UTF-8?Q?Hans_S=C3=B6derlund?= , Fabio Estevam , linux-kernel Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" --0000000000004cf88e05ffcf84de Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Jul 6, 2023 at 4:47=E2=80=AFPM Andreas Henriksson wrote: > Hello Shengjiu, Fabio, > > On Thu, May 19, 2022 at 10:23:06AM -0300, Fabio Estevam wrote: > > Hi Shengjiu, > > > > On Thu, May 19, 2022 at 9:49 AM Shengjiu Wang > wrote: > > > > > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c > > > index fa950dde5310..dae16a14f177 100644 > > > --- a/sound/soc/fsl/fsl_sai.c > > > +++ b/sound/soc/fsl/fsl_sai.c > > > @@ -437,6 +437,12 @@ static int fsl_sai_set_bclk(struct snd_soc_dai > *dai, bool tx, u32 freq) > > > FSL_SAI_CR2_DIV_MASK | > FSL_SAI_CR2_BYP, > > > savediv / 2 - 1); > > > > > > + if (sai->soc_data->max_register >=3D FSL_SAI_MCTL) { > > > > Isn't it a bit fragile to take this decision based on the number of > > SAI registers in the SoC? > > > > What about adding a specific field in soc_data for such a purpose? > > We've been working on an i.MX8MP where MCLK needs to be input and found > that this enables the MCLK as output despite not having set the > `fsl,sai-mclk-direction-output;` devicetree property in our DT. > Reverting the patch fixes the issues for us. > > Good catch. seems there is an issue here. best regards wang shengjiu I have to say that the code comment made me a bit confused, but once > I found the commit message I understood why this code existed. > If this is really i.MX8MM specific maybe mention that in the code > comment and please make the code actually only trigger on i.MX8MM. > It seems to me like these all fulfill the current criteria: > imx7ulp, imx8mq, imx8mm, imx8mp, imx8ulp, imx93 > > Should I report this in bugzilla.kernel.org ? > > Regards, > Andreas Henriksson > --0000000000004cf88e05ffcf84de Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Thu, Jul 6, 2023 at 4:47=E2=80=AFP= M Andreas Henriksson <andreas@fatal.= se> wrote:
shengjiu.wang@nxp.com> wrote:=
>
> > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c > > index fa950dde5310..dae16a14f177 100644
> > --- a/sound/soc/fsl/fsl_sai.c
> > +++ b/sound/soc/fsl/fsl_sai.c
> > @@ -437,6 +437,12 @@ static int fsl_sai_set_bclk(struct snd_soc_d= ai *dai, bool tx, u32 freq)
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 FSL_SAI_CR2_DIV= _MASK | FSL_SAI_CR2_BYP,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 savediv / 2 - 1= );
> >
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0if (sai->soc_data->max_register= >=3D FSL_SAI_MCTL) {
>
> Isn't it a bit fragile to take this decision based on the number o= f
> SAI registers in the SoC?
>
> What about adding a specific field in soc_data for such a purpose?

We've been working on an i.MX8MP where MCLK needs to be input and found=
that this enables the MCLK as output despite not having set the
`fsl,sai-mclk-direction-output;` devicetree property in our DT.
Reverting the patch fixes the issues for us.

Good catch. seems there is an issue here.
<= br>
best regards
wang shengjiu=C2=A0

I have to say that the code comment made me a bit confused, but once
I found the commit message I understood why this code existed.
If this is really i.MX8MM specific maybe mention that in the code
comment and please make the code actually only trigger on i.MX8MM.
It seems to me like these all fulfill the current criteria:
imx7ulp, imx8mq, imx8mm, imx8mp, imx8ulp, imx93

Should I report this in bugzilla.kernel.org ?

Regards,
Andreas Henriksson
--0000000000004cf88e05ffcf84de--