From: "Shreyas B. Prabhu" <shreyasbp@gmail.com>
To: Nicholas Piggin <npiggin@gmail.com>
Cc: Gautham R Shenoy <ego@linux.vnet.ibm.com>,
Mahesh J Salgaonkar <mahesh@linux.vnet.ibm.com>,
linuxppc-dev@lists.ozlabs.org,
"Shreyas B . Prabhu" <shreyas@linux.vnet.ibm.com>
Subject: Re: [PATCH] powerpc/64s: relocation, register save fixes for system reset interrupt
Date: Thu, 3 Nov 2016 02:32:39 -0400 [thread overview]
Message-ID: <CAAVMmb7wmgYY6AFLb2kqJsgOJwQK_vYaJtxmeouF9ZXezWtEDA@mail.gmail.com> (raw)
In-Reply-To: <20161103171751.44798270@roar.ozlabs.ibm.com>
On Thu, Nov 3, 2016 at 2:17 AM, Nicholas Piggin <npiggin@gmail.com> wrote:
> On Thu, 3 Nov 2016 01:56:46 -0400
> "Shreyas B. Prabhu" <shreyasbp@gmail.com> wrote:
>
>> On Thu, Nov 3, 2016 at 1:21 AM, Nicholas Piggin <npiggin@gmail.com> wrote:
>> > On Wed, 2 Nov 2016 14:15:48 +0530
>> > Gautham R Shenoy <ego@linux.vnet.ibm.com> wrote:
>> >
>> >> Hi Nick,
>> >>
>> >> On Wed, Nov 02, 2016 at 07:36:24PM +1100, Nicholas Piggin wrote:
>> >> >
>> >> > Okay, I'll work with that. What's the best way to make a P8 do
>> >> > winkle sleeps?
>> >>
>> >> From the userspace, offlining the CPUs of the core will put them to
>> >> winkle.
>> >
>> > Thanks for this. Hum, that r13 manipulation throughout the idle
>> > and exception code is a bit interesting. I'll do the minimal patch
>> > for 4.9, but what's the reason not to just use the winkle state
>> > in the PACA rather than storing it into HSPRG0 bit, can you (or
>> > Shreyas) explain?
>> >
>> Hi Nick,
>>
>> Before deep winkle, checking SRR1's wakeup bits (Bits 46:47) was enough to
>> figure out which idle state we are waking up from. But in P8, SRR1's wakeup
>> bits aren't enough since bits 46:47 are 0b11 for both fast sleep and
>> deep winkle.
>> So to distinguish bw fastsleep and deep winkle, we use the current HSPRG0/PORE
>> trick. We program the PORE engine (which is used for state restore when waking
>> up from deep winkle) to restore HSPRG0 with the last bit set (we do this in
>> pnv_save_sprs_for_winkle()). R13 bit manipulation in pnv_restore_hyp_resource
>> is related to this.
>
> Right, I didn't realize how that exactly worked until I had to go read
> the code just now. It's a neat little trick. I'm wondering can we use PACA_THREAD_IDLE_STATE==PNV_THREAD_WINKLE for this instead? It would just
> make the early PACA usage in the exception handlers able to use more common
> code.
>
PACA_THREAD_IDLE_STATE will have what was 'requested'. It may not be the
state we are waking up from. For example, if 7 threads of the core execute
winkle instruction while 1 thread of the same core executes sleep. Here
the core only enters sleep whereas PACA_THREAD_IDLE_STATE for the 7 threads
will have PNV_THREAD_WINKLE.
Thanks,
Shreyas
next prev parent reply other threads:[~2016-11-03 6:32 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-13 2:17 [PATCH] powerpc/64s: relocation, register save fixes for system reset interrupt Nicholas Piggin
2016-10-13 11:02 ` Gautham R Shenoy
2016-10-13 11:54 ` Balbir Singh
2016-10-14 3:16 ` Nicholas Piggin
2016-10-14 5:45 ` Balbir Singh
2016-10-27 11:38 ` Michael Ellerman
2016-10-28 12:01 ` Balbir Singh
2016-11-02 6:04 ` [PATCH] " Mahesh Jagannath Salgaonkar
2016-11-02 6:57 ` Nicholas Piggin
2016-11-02 8:24 ` Mahesh J Salgaonkar
2016-11-02 8:36 ` Nicholas Piggin
2016-11-02 8:45 ` Gautham R Shenoy
2016-11-03 5:21 ` Nicholas Piggin
2016-11-03 5:56 ` Shreyas B. Prabhu
2016-11-03 6:17 ` Nicholas Piggin
2016-11-03 6:32 ` Shreyas B. Prabhu [this message]
2016-11-03 7:02 ` Nicholas Piggin
2016-11-04 9:04 ` Gautham R Shenoy
2016-11-04 11:47 ` Nicholas Piggin
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