From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-we0-x22a.google.com (mail-we0-x22a.google.com [IPv6:2a00:1450:400c:c03::22a]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 92E6D1A1281 for ; Fri, 8 Aug 2014 17:22:42 +1000 (EST) Received: by mail-we0-f170.google.com with SMTP id w62so5183397wes.29 for ; Fri, 08 Aug 2014 00:22:36 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <3e55262eed7c4b6b9e08e8b792d82e7b@CY1PR0301MB0857.namprd03.prod.outlook.com> References: <3e55262eed7c4b6b9e08e8b792d82e7b@CY1PR0301MB0857.namprd03.prod.outlook.com> From: Vineeth Date: Fri, 8 Aug 2014 12:52:16 +0530 Message-ID: Subject: Re: T1040QDS warm reboot To: Priyanka Jain Content-Type: multipart/alternative; boundary=f46d04138d31d263f30500191161 Cc: "linuxppc-dev@lists.ozlabs.org" List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , --f46d04138d31d263f30500191161 Content-Type: text/plain; charset=UTF-8 Again, warm-reboot WORKS. there's no issue with that. My ONLY concern is i am not able to understand how it works; the ref.manual information and the code doesnt match. Vineeth On Fri, Aug 8, 2014 at 12:35 PM, Priyanka Jain wrote: > Thanks Vineeth for pointing this. > > > > We will check this on T1040QDS and get back. > > > > > > Regards > > Priyanka > > > > *From:* Linuxppc-dev [mailto:linuxppc-dev-bounces+priyanka.jain= > freescale.com@lists.ozlabs.org] *On Behalf Of *Vineeth > *Sent:* Friday, August 08, 2014 11:35 AM > *To:* linuxppc-dev@lists.ozlabs.org > *Subject:* T1040QDS warm reboot > > > > Was wondering how "reboot" works from linux kernel for t1040qds. > > When checked, @arch/powerpc/sysdev/fsl_soc.c > > __setup_rstcr, an ioremap is done for the offset 0xb0 and writes 0x2 to > that to reboot the machine. and it works properly. > > when checked the reference manual for T1040QDS, it was given that RST_CTL > is at offset 0x40 and the RST is the 7th bit of same. > > then how's has-rstcr/reboot works ? > > Vineeth > > > > > --f46d04138d31d263f30500191161 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
Again, warm-reboot WORKS. there's no issue with t= hat.
My ONLY concern is i am not able to understand how it works; = the ref.manual information and the code doesnt match.

Vineeth


On Fri, Aug 8= , 2014 at 12:35 PM, Priyanka Jain <Priyanka.Jain@freescale.com> wrote:

Thanks Vineeth for pointi= ng this.

=C2=A0

We will check this on T10= 40QDS and get back.

=C2=A0

=C2=A0

Regards

Priyanka

=C2=A0

From: Linuxp= pc-dev [mailto:linuxppc-dev-bounces+priyanka.jain=3Dfreescale.com@lists.ozlabs.= org] On Behalf Of Vineeth
Sent: Friday, August 08, 2014 11:35 AM
To: linuxppc-dev@lists.ozlabs.org
Subject: T1040QDS warm reboot

=C2=A0

Was wondering how &qu= ot;reboot" works from linux kernel for t1040qds.

When checked, @arch/powerpc/sysdev/fsl_soc.c =

__setup_rstcr, an ior= emap is done for the offset 0xb0 and writes 0x2 to that to reboot the machi= ne. and it works properly.

when checked the refe= rence manual for T1040QDS, it was given that RST_CTL is at offset 0x40 and = the RST is the 7th bit of same.

then how's has-rs= tcr/reboot works ?

Vineeth

=C2=A0

=C2=A0


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