T1040QDS warm reboot

T1040QDS warm reboot

[Vineeth]

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Was wondering how "reboot" works from linux kernel for t1040qds.

When checked, @arch/powerpc/sysdev/fsl_soc.c
__setup_rstcr, an ioremap is done for the offset 0xb0 and writes 0x2 to
that to reboot the machine. and it works properly.

when checked the reference manual for T1040QDS, it was given that RST_CTL
is at offset 0x40 and the RST is the 7th bit of same.

then how's has-rstcr/reboot works ?

Vineeth

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RE: T1040QDS warm reboot

[Priyanka Jain]

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Thanks Vineeth for pointing this.

We will check this on T1040QDS and get back.


Regards
Priyanka

From: Linuxppc-dev [mailto:linuxppc-dev-bounces+priyanka.jain=freescale.com@lists.ozlabs.org] On Behalf Of Vineeth
Sent: Friday, August 08, 2014 11:35 AM
To: linuxppc-dev@lists.ozlabs.org
Subject: T1040QDS warm reboot

Was wondering how "reboot" works from linux kernel for t1040qds.
When checked, @arch/powerpc/sysdev/fsl_soc.c
__setup_rstcr, an ioremap is done for the offset 0xb0 and writes 0x2 to that to reboot the machine. and it works properly.
when checked the reference manual for T1040QDS, it was given that RST_CTL is at offset 0x40 and the RST is the 7th bit of same.
then how's has-rstcr/reboot works ?
Vineeth



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Re: T1040QDS warm reboot

[Vineeth]

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Again, warm-reboot WORKS. there's no issue with that.
My ONLY concern is i am not able to understand how it works; the ref.manual
information and the code doesnt match.

Vineeth


On Fri, Aug 8, 2014 at 12:35 PM, Priyanka Jain <Priyanka.Jain@freescale.com>
wrote:

>  Thanks Vineeth for pointing this.
>
>
>
> We will check this on T1040QDS and get back.
>
>
>
>
>
> Regards
>
> Priyanka
>
>
>
> *From:* Linuxppc-dev [mailto:linuxppc-dev-bounces+priyanka.jain=
> freescale.com@lists.ozlabs.org] *On Behalf Of *Vineeth
> *Sent:* Friday, August 08, 2014 11:35 AM
> *To:* linuxppc-dev@lists.ozlabs.org
> *Subject:* T1040QDS warm reboot
>
>
>
> Was wondering how "reboot" works from linux kernel for t1040qds.
>
> When checked, @arch/powerpc/sysdev/fsl_soc.c
>
> __setup_rstcr, an ioremap is done for the offset 0xb0 and writes 0x2 to
> that to reboot the machine. and it works properly.
>
> when checked the reference manual for T1040QDS, it was given that RST_CTL
> is at offset 0x40 and the RST is the 7th bit of same.
>
> then how's has-rstcr/reboot works ?
>
> Vineeth
>
>
>
>
>

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Re: T1040QDS warm reboot

[Scott Wood]

On Fri, 2014-08-08 at 11:35 +0530, Vineeth wrote:
> Was wondering how "reboot" works from linux kernel for t1040qds.
> 
> 
> When checked, @arch/powerpc/sysdev/fsl_soc.c 
> 
> __setup_rstcr, an ioremap is done for the offset 0xb0 and writes 0x2
> to that to reboot the machine. and it works properly.
> 
> 
> when checked the reference manual for T1040QDS, it was given that
> RST_CTL is at offset 0x40 and the RST is the 7th bit of same. 

RSTCR is an SoC register (see DCFG_CCSR_RSTCR in T1040RM), not something
implemented by the board.  Are you perhaps looking at some QIXIS
register?

-Scott