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Thu, 23 Nov 2023 02:44:33 -0800 (PST) MIME-Version: 1.0 References: <20231118033859.726692-1-apatel@ventanamicro.com> <20231118033859.726692-3-apatel@ventanamicro.com> In-Reply-To: From: Anup Patel Date: Thu, 23 Nov 2023 16:14:21 +0530 Message-ID: Subject: Re: [PATCH v4 2/5] RISC-V: Add SBI debug console helper routines To: Samuel Holland Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jiri Slaby , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Conor Dooley , Palmer Dabbelt , linux-serial@vger.kernel.org, Paul Walmsley , linux-riscv@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, Andrew Jones Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Nov 22, 2023 at 4:15=E2=80=AFAM Samuel Holland wrote: > > Hi Anup, > > On 2023-11-17 9:38 PM, Anup Patel wrote: > > Let us provide SBI debug console helper routines which can be > > shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c. > > > > Signed-off-by: Anup Patel > > --- > > arch/riscv/include/asm/sbi.h | 5 +++++ > > arch/riscv/kernel/sbi.c | 43 ++++++++++++++++++++++++++++++++++++ > > 2 files changed, 48 insertions(+) > > > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.= h > > index 66f3933c14f6..ee7aef5f6233 100644 > > --- a/arch/riscv/include/asm/sbi.h > > +++ b/arch/riscv/include/asm/sbi.h > > @@ -334,6 +334,11 @@ static inline unsigned long sbi_mk_version(unsigne= d long major, > > } > > > > int sbi_err_map_linux_errno(int err); > > + > > +extern bool sbi_debug_console_available; > > +int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_a= ddr); > > +int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_ad= dr); > > + > > #else /* CONFIG_RISCV_SBI */ > > static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) {= return -1; } > > static inline void sbi_init(void) {} > > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c > > index 5a62ed1da453..73a9c22c3945 100644 > > --- a/arch/riscv/kernel/sbi.c > > +++ b/arch/riscv/kernel/sbi.c > > @@ -571,6 +571,44 @@ long sbi_get_mimpid(void) > > } > > EXPORT_SYMBOL_GPL(sbi_get_mimpid); > > > > +bool sbi_debug_console_available; > > + > > +int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_a= ddr) > > +{ > > + struct sbiret ret; > > + > > + if (!sbi_debug_console_available) > > + return -EOPNOTSUPP; > > + > > + if (IS_ENABLED(CONFIG_32BIT)) > > + ret =3D sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRIT= E, > > + num_bytes, lower_32_bits(base_addr), > > + upper_32_bits(base_addr), 0, 0, 0); > > + else > > + ret =3D sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRIT= E, > > + num_bytes, base_addr, 0, 0, 0, 0); > > + > > + return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value= ; > > +} > > + > > +int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_ad= dr) > > +{ > > + struct sbiret ret; > > + > > + if (!sbi_debug_console_available) > > + return -EOPNOTSUPP; > > + > > + if (IS_ENABLED(CONFIG_32BIT)) > > + ret =3D sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ= , > > + num_bytes, lower_32_bits(base_addr), > > + upper_32_bits(base_addr), 0, 0, 0); > > + else > > + ret =3D sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ= , > > + num_bytes, base_addr, 0, 0, 0, 0); > > + > > + return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value= ; > > +} > > Since every place that calls these functions will need to do the vmalloc = lookup, > would it make sense to do it here, and have these take a pointer instead? Yes, that's better. I will update. Regards, Anup