From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io1-xd41.google.com (mail-io1-xd41.google.com [IPv6:2607:f8b0:4864:20::d41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 429wpV5Vy2zF3S6 for ; Thu, 13 Sep 2018 21:07:14 +1000 (AEST) Received: by mail-io1-xd41.google.com with SMTP id l7-v6so2775412iok.6 for ; Thu, 13 Sep 2018 04:07:14 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <153677132617.23091.12307288405707171077.stgit@bhelgaas-glaptop.roam.corp.google.com> <20180912165846.GH118330@bhelgaas-glaptop.roam.corp.google.com> From: Oliver Date: Thu, 13 Sep 2018 21:07:12 +1000 Message-ID: Subject: Re: [PATCH] MAINTAINERS: Add PPC contacts for PCI core error handling To: Benjamin Herrenschmidt Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, Russell Currey , linuxppc-dev , Paul Mackerras , Michael Ellerman , Linux Kernel Mailing List , Oliver OHalloran Content-Type: text/plain; charset="UTF-8" List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Thu, Sep 13, 2018 at 6:35 PM, Benjamin Herrenschmidt wrote: > On Wed, 2018-09-12 at 11:58 -0500, Bjorn Helgaas wrote: >> > Add the generic PCI core error recovery files to the powerpc EEH >> > MAINTAINERS entry so the powerpc folks will be copied on changes to the >> > generic PCI error handling strategy. >> >> I really want to make sure the powerpc folks are plugged into any PCI core >> error handling discussions. Please let me know if there's a better way >> than this patch, or if there are other people who should be added. > > Sounds good. Oliver, you want to be looped in as well ? Sure, putting all of EEH on Sam is probably not a nice thing to do. > Cheers, > Ben. > >