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From: Segher Boessenkool <segher@kernel.crashing.org>
Subject: Re: [RFC PATCH 03/19] powerpc: gamecube: bootwrapper bits
Date: Tue, 24 Nov 2009 22:00:08 +0100
To: Albert Herranz <albert_herranz@yahoo.es>
Cc: linuxppc-dev@lists.ozlabs.org
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>>> +asm ("\n\
>>
>>
>> A file scope asm?!  Please don't.
>>
> So what's your proposal then? Placing it within a fake func?
> That asm snippet is the entry point. I took as an example how  
> prpmc2800.c deals with that, providing an own version of the (weak)  
> _zImage_start.

Use an assembler source file.  You'll get much nicer syntax as well
(none of that \n stuff).

>>> +    /* IBAT3,DBAT3 for first 16Mbytes */\n\
>>> +    li    8, 0x01ff    /* 16MB */\n\
>>> +    li      9, 0x0002    /* rw */\n\
>>> +    mtspr   0x216, 8    /* IBAT3U */\n\
>>> +    mtspr   0x217, 9    /* IBAT3L */\n\
>>> +    mtspr   0x21e, 8    /* DBAT3U */\n\
>>> +    mtspr   0x21f, 9    /* DBAT3L */\n\
>>
>> WIMG=0000, are you sure?  Not M=1?
>
> To be honest, I don't recall the details now.
> But it was tested in the very early days, the result was not the  
> expected one and, in the end, manual cache coherency management was  
> still needed.

Sure, the memory controllers don't do coherency.  I'm slightly worried
about two things:
1) Will the generic code use M=0 as well?  Is it a problem if it  
doesn't?
2) Do lwarx. etc. work in M=0?

And a question: does M=0 actually give better performance (lower bus
utilisation, and maybe saves a few cycles)?


Segher