From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 88F4C2C03A6 for ; Thu, 21 Nov 2013 05:47:43 +1100 (EST) Content-Type: text/plain; charset=windows-1252 Mime-Version: 1.0 (Mac OS X Mail 7.0 \(1822\)) Subject: Re: [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well From: Kumar Gala In-Reply-To: <1384965671.1403.414.camel@snotra.buserror.net> Date: Wed, 20 Nov 2013 12:47:33 -0600 Message-Id: References: <1384936551-8494-1-git-send-email-tiejun.chen@windriver.com> <1384965671.1403.414.camel@snotra.buserror.net> To: Scott Wood Cc: Tiejun Chen , linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Nov 20, 2013, at 10:41 AM, Scott Wood = wrote: > On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote: >> CONFIG_ALTIVEC is always enabled for CoreNet64. >=20 > In the defconfig perhaps, but this isn't a generally true statement. >=20 >> And if we select CONFIG_E{5,6}500_CPU this may introduce = -mcpu=3De500mc64 >> into $CFLAGS. But Altivec and Spe options not allowed with >> e500mc64, so : >=20 > Sigh. >=20 >> CC arch/powerpc/lib/xor_vmx.o >> arch/powerpc/lib/xor_vmx.c:1:0: error: AltiVec not supported in this = target >> make[1]: *** [arch/powerpc/lib/xor_vmx.o] Error 1 >> make: *** [arch/powerpc/lib] Error 2 >>=20 >> Signed-off-by: Tiejun Chen >> --- >> arch/powerpc/lib/Makefile | 3 +++ >> 1 file changed, 3 insertions(+) >>=20 >> diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile >> index 95a20e1..641a77d 100644 >> --- a/arch/powerpc/lib/Makefile >> +++ b/arch/powerpc/lib/Makefile >> @@ -40,5 +40,8 @@ obj-y +=3D code-patching.o >> obj-y +=3D feature-fixups.o >> obj-$(CONFIG_FTR_FIXUP_SELFTEST) +=3D feature-fixups-test.o >>=20 >> +# Altivec and Spe options not allowed with e500mc64 in GCC. >> +ifeq ($(call cc-option-yn,-mcpu=3De500mc64),n) >> obj-$(CONFIG_ALTIVEC) +=3D xor_vmx.o >> CFLAGS_xor_vmx.o +=3D -maltivec -mabi=3Daltivec >> +endif >=20 > This does not seem like the right fix. What if GCC supports both > -mcpu=3De500mc64 and -mcpu=3De6500, and we're using the latter? Or = for that > matter, if we're using -mcpu=3Dwhatever-ibm-chip-has-this? >=20 > Plus, wouldn't you need to do something to prevent code in that file > from being called? >=20 > -Scott Why does -mcpu=3De500mc64 get you spe enabled? It shouldn=92t as no = e500mc or greater part has spe. Can you try using -mno-spe -maltivec? - k=