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From: Kumar Gala <galak@kernel.crashing.org>
To: Scott Wood <scottwood@freescale.com>
Cc: "linuxppc-dev@ozlabs.org list" <linuxppc-dev@ozlabs.org>
Subject: Re: suggestions on handling additional exception levels on ppc32
Date: Mon, 28 Apr 2008 13:06:25 -0500	[thread overview]
Message-ID: <CC53A7EB-663C-4313-8FE3-CAF57F270437@kernel.crashing.org> (raw)
In-Reply-To: <20080428170418.GA11378@ld0162-tx32.am.freescale.net>


On Apr 28, 2008, at 12:04 PM, Scott Wood wrote:
> On Mon, Apr 28, 2008 at 11:58:58AM -0500, Kumar Gala wrote:
>>
>> On Apr 28, 2008, at 10:59 AM, Scott Wood wrote:
>>> On Mon, Apr 28, 2008 at 10:40:56AM -0500, Kumar Gala wrote:
>>>> A few possibilities:
>>>> * introduce an additional function pointer as part of
>>>> EXC_XFER_TEMPLATE() to specifies the type of handler (normal, crit,
>>>> dbg, mcheck)
>>>> * use the traps field low order bits to determine normal, crit,  
>>>> dbg,
>>>> mcheck at run time.
>>>> * duplicate the code paths for each exception level
>>>>
>>>> suggestions?
>>>
>>> You could temporarily disable all asynchronous exceptions, and use  
>>> the
>>> registers of the highest-priority exception type.
>>
>> That doesn't work.  We have NMIs or will have them in the future.
>
> Truly non-maskable?  Ick.  You could have a separate code path just  
> for
> the exception type that NMIs use, I guess, if there's a clear
> highest-priority among the remaining interrupt types.  What sort of
> exceptions are they?

The NMIs are machine check only so a separate path for them isn't a  
terrible idea.

However, disabling all other interrupts seems worse than adding a  
function pointer.

- k

      reply	other threads:[~2008-04-28 18:06 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-04-28 15:40 suggestions on handling additional exception levels on ppc32 Kumar Gala
2008-04-28 15:59 ` Scott Wood
2008-04-28 16:58   ` Kumar Gala
2008-04-28 17:04     ` Scott Wood
2008-04-28 18:06       ` Kumar Gala [this message]

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