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Subject: Re: [PATCH] powerpc/fsl-booke: Handle L1 D-cache parity error
 correctly on e500mc
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From: Kumar Gala <galak@kernel.crashing.org>
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Date: Tue, 11 Oct 2011 23:18:33 -0500
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To: Kumar Gala <galak@kernel.crashing.org>
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On Aug 27, 2011, at 6:18 AM, Kumar Gala wrote:

> If the L1 D-Cache is in write shadow mode the HW will auto-recover the
> error.  However we might still log the error and cause a machine check
> (if L1CSR0[CPE] - Cache error checking enable).  We should only treat
> the non-write shadow case as non-recoverable.
> 
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/include/asm/reg_booke.h |    3 +++
> arch/powerpc/kernel/traps.c          |    9 ++++++++-
> 2 files changed, 11 insertions(+), 1 deletions(-)

applied

- k