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[118.208.203.28]) by smtp.gmail.com with ESMTPSA id y20-20020a170902ed5400b00174f7d107c8sm21179815plb.293.2022.09.19.17.55.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Sep 2022 17:55:38 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 20 Sep 2022 10:55:33 +1000 Message-Id: Subject: Re: [PATCH 07/23] powerpc/64s: Fix comment on interrupt handler prologue From: "Nicholas Piggin" To: "Rohan McLure" , X-Mailer: aerc 0.11.0 References: <20220916053300.786330-1-rmclure@linux.ibm.com> <20220916053300.786330-8-rmclure@linux.ibm.com> In-Reply-To: <20220916053300.786330-8-rmclure@linux.ibm.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri Sep 16, 2022 at 3:32 PM AEST, Rohan McLure wrote: > Interrupt handlers on 64s systems will often need to save register state > from the interrupted process to make space for loading special purpose > registers or for internal state. > > Fix a comment documenting a common code path macro in the beginning of > interrupt handlers where r10 is saved to the PACA to afford space for > the value of the CFAR. Comment is currently written as if r10-r12 are > saved to PACA, but in fact only r10 is saved, with r11-r12 saved much > later. The distance in code between these saves has grown over the many > revisions of this macro. Fix this by signalling with a comment where > r11-r12 are saved to the PACA. > > Signed-off-by: Rohan McLure > Reported-by: Nicholas Piggin Reviewed-by: Nicholas Piggin > --- > V1 -> V2: Given its own commit > V2 -> V3: Annotate r11-r12 save locations with comment. > --- > arch/powerpc/kernel/exceptions-64s.S | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/e= xceptions-64s.S > index 3d0dc133a9ae..a3b51441b039 100644 > --- a/arch/powerpc/kernel/exceptions-64s.S > +++ b/arch/powerpc/kernel/exceptions-64s.S > @@ -281,7 +281,7 @@ BEGIN_FTR_SECTION > mfspr r9,SPRN_PPR > END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) > HMT_MEDIUM > - std r10,IAREA+EX_R10(r13) /* save r10 - r12 */ > + std r10,IAREA+EX_R10(r13) /* save r10 */ > .if ICFAR > BEGIN_FTR_SECTION > mfspr r10,SPRN_CFAR > @@ -321,7 +321,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR) > mfctr r10 > std r10,IAREA+EX_CTR(r13) > mfcr r9 > - std r11,IAREA+EX_R11(r13) > + std r11,IAREA+EX_R11(r13) /* save r11 - r12 */ > std r12,IAREA+EX_R12(r13) > =20 > /* > --=20 > 2.34.1