linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: "Nicholas Piggin" <npiggin@gmail.com>
To: "Thomas Huth" <thuth@redhat.com>
Cc: Laurent Vivier <lvivier@redhat.com>,
	linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org,
	Andrew Jones <andrew.jones@linux.dev>
Subject: Re: [kvm-unit-tests PATCH v9 27/31] powerpc: add pmu tests
Date: Wed, 05 Jun 2024 11:12:00 +1000	[thread overview]
Message-ID: <D1ROMSW6KNIP.147TMWG5219NK@gmail.com> (raw)
In-Reply-To: <c497801d-f043-46f5-bfa2-74eff672ae47@redhat.com>

On Tue Jun 4, 2024 at 8:38 PM AEST, Thomas Huth wrote:
> On 04/05/2024 14.28, Nicholas Piggin wrote:
> > Add some initial PMU testing.
> > 
> > - PMC5/6 tests
> > - PMAE / PMI test
> > - BHRB basic tests
> > 
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > ---
> ...
> > diff --git a/lib/powerpc/setup.c b/lib/powerpc/setup.c
> > index a4ff678ce..8ff4939e2 100644
> > --- a/lib/powerpc/setup.c
> > +++ b/lib/powerpc/setup.c
> > @@ -33,6 +33,7 @@ u32 initrd_size;
> >   u32 cpu_to_hwid[NR_CPUS] = { [0 ... NR_CPUS-1] = (~0U) };
> >   int nr_cpus_present;
> >   uint64_t tb_hz;
> > +uint64_t cpu_hz;
> >   
> >   struct mem_region mem_regions[NR_MEM_REGIONS];
> >   phys_addr_t __physical_start, __physical_end;
> > @@ -42,6 +43,7 @@ struct cpu_set_params {
> >   	unsigned icache_bytes;
> >   	unsigned dcache_bytes;
> >   	uint64_t tb_hz;
> > +	uint64_t cpu_hz;
> >   };
> >   
> >   static void cpu_set(int fdtnode, u64 regval, void *info)
> > @@ -95,6 +97,22 @@ static void cpu_set(int fdtnode, u64 regval, void *info)
> >   		data = (u32 *)prop->data;
> >   		params->tb_hz = fdt32_to_cpu(*data);
> >   
> > +		prop = fdt_get_property(dt_fdt(), fdtnode,
> > +					"ibm,extended-clock-frequency", NULL);
> > +		if (prop) {
> > +			data = (u32 *)prop->data;
> > +			params->cpu_hz = fdt32_to_cpu(*data);
> > +			params->cpu_hz <<= 32;
> > +			data = (u32 *)prop->data + 1;
> > +			params->cpu_hz |= fdt32_to_cpu(*data);
>
> Why don't you simply cast to (u64 *) and use fdt64_to_cpu() here instead?

Hmm... probably because I copied from somewhere. Good idea though.

>
> ...
> > diff --git a/powerpc/pmu.c b/powerpc/pmu.c
> > new file mode 100644
> > index 000000000..8b13ee4cd
> > --- /dev/null
> > +++ b/powerpc/pmu.c
> > @@ -0,0 +1,403 @@
> ...
> > +static void test_pmc5_with_fault(void)
> > +{
> > +	unsigned long pmc5_1, pmc5_2;
> > +
> > +	handle_exception(0x700, &illegal_handler, NULL);
> > +	handle_exception(0xe40, &illegal_handler, NULL);
> > +
> > +	reset_mmcr0();
> > +	mtspr(SPR_PMC5, 0);
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
> > +	asm volatile(".long 0x0" ::: "memory");
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
> > +	assert(got_interrupt);
> > +	got_interrupt = false;
> > +	pmc5_1 = mfspr(SPR_PMC5);
> > +
> > +	reset_mmcr0();
> > +	mtspr(SPR_PMC5, 0);
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
> > +	asm volatile(".rep 20 ; nop ; .endr ; .long 0x0" ::: "memory");
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
> > +	assert(got_interrupt);
> > +	got_interrupt = false;
> > +	pmc5_2 = mfspr(SPR_PMC5);
> > +
> > +	/* TCG and POWER9 do not count instructions around faults correctly */
> > +	report_kfail(true, pmc5_1 + 20 == pmc5_2, "PMC5 counts instructions with fault");
>
> It would be nice to have the TCG detection patch before this patch, so you 
> could use the right condition here right from the start.

Yeah, it turned out to be a bit annoying to rebase. We already have
some kfail(true in the tree but I will remove those at least toward
the end of the series.

I might take another look at reordering it after I rebase what you
have merged.

>
> > +	handle_exception(0x700, NULL, NULL);
> > +	handle_exception(0xe40, NULL, NULL);
> > +}
> > +
> > +static void test_pmc5_with_sc(void)
> > +{
> > +	unsigned long pmc5_1, pmc5_2;
> > +
> > +	handle_exception(0xc00, &sc_handler, NULL);
> > +
> > +	reset_mmcr0();
> > +	mtspr(SPR_PMC5, 0);
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
> > +	asm volatile("sc 0" ::: "memory");
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
> > +	assert(got_interrupt);
> > +	got_interrupt = false;
> > +	pmc5_1 = mfspr(SPR_PMC5);
> > +
> > +	reset_mmcr0();
> > +	mtspr(SPR_PMC5, 0);
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
> > +	asm volatile(".rep 20 ; nop ; .endr ; sc 0" ::: "memory");
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
> > +	assert(got_interrupt);
> > +	got_interrupt = false;
> > +	pmc5_2 = mfspr(SPR_PMC5);
> > +
> > +	/* TCG does not count instructions around syscalls correctly */
> > +	report_kfail(true, pmc5_1 + 20 == pmc5_2, "PMC5 counts instructions with syscall");
>
> dito
>
> > +	handle_exception(0xc00, NULL, NULL);
> > +}
> > +
> > +static void test_pmc56(void)
> > +{
> > +	unsigned long tmp;
> > +
> > +	report_prefix_push("pmc56");
> > +
> > +	reset_mmcr0();
> > +	mtspr(SPR_PMC5, 0);
> > +	mtspr(SPR_PMC6, 0);
> > +	report(mfspr(SPR_PMC5) == 0, "PMC5 zeroed");
> > +	report(mfspr(SPR_PMC6) == 0, "PMC6 zeroed");
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~MMCR0_FC);
> > +	msleep(100);
> > +	report(mfspr(SPR_PMC5) == 0, "PMC5 frozen");
> > +	report(mfspr(SPR_PMC6) == 0, "PMC6 frozen");
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~MMCR0_FC56);
> > +	mdelay(100);
> > +	mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
> > +	report(mfspr(SPR_PMC5) != 0, "PMC5 counting");
> > +	report(mfspr(SPR_PMC6) != 0, "PMC6 counting");
> > +
> > +	/* Dynamic frequency scaling could cause to be out, so don't fail. */
> > +	tmp = mfspr(SPR_PMC6);
> > +	report(true, "PMC6 ratio to reported clock frequency is %ld%%", tmp * 1000 / cpu_hz);
>
> report(true, ...) looks weird. Use report_info() instead?

Ah yes that's better. I was going to do a pass/fail threshold but that
gets pretty arbitrary depending on DVFS.. I guess for TCG we could report
a pass/fail.

Thanks,
Nick

  reply	other threads:[~2024-06-05  1:12 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-04 12:28 [kvm-unit-tests PATCH v9 00/31] powerpc improvements Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 01/31] doc: update unittests doc Nicholas Piggin
2024-05-06  7:03   ` Thomas Huth
2024-05-07  3:57     ` Nicholas Piggin
2024-05-06  8:02   ` Andrew Jones
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 02/31] report: Add known failure reporting option Nicholas Piggin
2024-05-06  7:25   ` Thomas Huth
2024-05-06  8:01     ` Andrew Jones
2024-05-06 10:19       ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 03/31] powerpc: Mark known failing tests as kfail Nicholas Piggin
2024-05-06  7:37   ` Thomas Huth
2024-05-07  4:07     ` Nicholas Piggin
2024-05-07 11:44       ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 04/31] powerpc: Update unittests for latest QEMU version Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 05/31] powerpc/sprs: Specify SPRs with data rather than code Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 06/31] powerpc/sprs: Avoid taking PMU interrupts caused by register fuzzing Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 07/31] scripts: allow machine option to be specified in unittests.cfg Nicholas Piggin
2024-05-07 15:08   ` Thomas Huth
2024-05-08 12:27     ` Nicholas Piggin
2024-05-08 12:55       ` Thomas Huth
2024-05-08 12:58         ` Thomas Huth
2024-05-08 13:36           ` Thomas Huth
2024-05-09  5:44             ` Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 08/31] scripts: Accommodate powerpc powernv machine differences Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 09/31] powerpc: Support powernv machine with QEMU TCG Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 10/31] powerpc: Fix emulator illegal instruction test for powernv Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 11/31] powerpc/sprs: Test hypervisor registers on powernv machine Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 12/31] powerpc: general interrupt tests Nicholas Piggin
2024-05-07 12:12   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 13/31] powerpc: Add rtas stop-self support Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 14/31] powerpc: Remove broken SMP exception stack setup Nicholas Piggin
2024-06-03  9:30   ` Thomas Huth
2024-06-04  5:13     ` Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 15/31] powerpc: Enable page alloc operations Nicholas Piggin
2024-06-03  9:34   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 16/31] powerpc: add SMP and IPI support Nicholas Piggin
2024-06-04  5:14   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 17/31] powerpc: Add cpu_relax Nicholas Piggin
2024-05-07 13:44   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 18/31] powerpc: Permit ACCEL=tcg,thread=single Nicholas Piggin
2024-06-04  5:17   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 19/31] powerpc: Avoid using larx/stcx. in spinlocks when only one CPU is running Nicholas Piggin
2024-06-04  5:27   ` Thomas Huth
2024-06-05  0:56     ` Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 20/31] powerpc: Add atomics tests Nicholas Piggin
2024-06-04  5:29   ` Thomas Huth
2024-06-05  0:56     ` Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 21/31] powerpc: Add timebase tests Nicholas Piggin
2024-06-04  6:12   ` Thomas Huth
2024-06-05  1:04     ` Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 22/31] powerpc: Add MMU support Nicholas Piggin
2024-06-04  7:30   ` Thomas Huth
2024-06-05  1:06     ` Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 23/31] common/sieve: Use vmalloc.h for setup_mmu definition Nicholas Piggin
2024-06-04  7:53   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 24/31] common/sieve: Support machines without MMU Nicholas Piggin
2024-06-04  9:30   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 25/31] powerpc: Add sieve.c common test Nicholas Piggin
2024-06-04  9:30   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 26/31] powerpc: add usermode support Nicholas Piggin
2024-06-04 10:26   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 27/31] powerpc: add pmu tests Nicholas Piggin
2024-06-04 10:38   ` Thomas Huth
2024-06-05  1:12     ` Nicholas Piggin [this message]
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 28/31] configure: Make arch_libdir a first-class entity Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 29/31] powerpc: Remove remnants of ppc64 directory and build structure Nicholas Piggin
2024-06-04 10:49   ` Thomas Huth
2024-06-04 13:36     ` Andrew Jones
2024-06-05  7:52       ` Nicholas Piggin
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 30/31] powerpc: Add facility to query TCG or KVM host Nicholas Piggin
2024-06-04 10:53   ` Thomas Huth
2024-05-04 12:28 ` [kvm-unit-tests PATCH v9 31/31] powerpc: gitlab CI update Nicholas Piggin
2024-06-04 11:01   ` Thomas Huth
2024-06-05  1:16     ` Nicholas Piggin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=D1ROMSW6KNIP.147TMWG5219NK@gmail.com \
    --to=npiggin@gmail.com \
    --cc=andrew.jones@linux.dev \
    --cc=kvm@vger.kernel.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=lvivier@redhat.com \
    --cc=thuth@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).