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Wed, 29 Jan 2025 00:12:59 -0800 (PST) Received: from localhost ([1.146.123.110]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f83bc9a038sm981198a91.7.2025.01.29.00.12.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Jan 2025 00:12:59 -0800 (PST) X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Wed, 29 Jan 2025 18:12:55 +1000 Message-Id: Cc: Subject: Re: [PATCH 5/5] powerpc/microwatt: Add SMP support From: "Nicholas Piggin" To: "Paul Mackerras" X-Mailer: aerc 0.19.0 References: In-Reply-To: On Wed Jan 29, 2025 at 4:57 PM AEST, Paul Mackerras wrote: > On Wed, Jan 29, 2025 at 04:21:26PM +1000, Nicholas Piggin wrote: >> On Wed Jan 29, 2025 at 8:55 AM AEST, Paul Mackerras wrote: >> > This adds support for Microwatt systems with more than one core, and >> > updates the device tree for a 2-core version. (This does not prevent >> > the kernel from running on a single-core system.) >> > >> > Signed-off-by: Paul Mackerras >>=20 >> Well, I'm impressed you added SMP :) >>=20 >> What happens with a 1 CPU system? Do we time out waiting for secondaries >> and continue, or is there something more graceful? > > There's a field in the SYSCON register which tells you how many cores > there are. microwatt_init_smp() looks at that field and only starts > the CPUs that are there. Ah, nice. > Oops, sorry, I see that I forgot to do 'git add' on > arch/powerpc/platforms/microwatt/smp.c. Here it is (I'll include it > properly in v2, of course): > > // SPDX-License-Identifier: GPL-2.0-or-later > > /* > * SMP support functions for Microwatt > * Copyright 2025 Paul Mackerras > */ > > #include > #include > #include > #include > #include > > #include "microwatt.h" > > static void __init microwatt_smp_probe(void) > { > xics_smp_probe(); > } > > static void microwatt_smp_setup_cpu(int cpu) > { > if (cpu !=3D 0) > xics_setup_cpu(); > } > > static struct smp_ops_t microwatt_smp_ops =3D { > .probe =3D microwatt_smp_probe, > .message_pass =3D NULL, /* Use smp_muxed_ipi_message_pass */ > .kick_cpu =3D smp_generic_kick_cpu, > .setup_cpu =3D microwatt_smp_setup_cpu, > }; > > /* XXX get from device tree */ > #define SYSCON_BASE 0xc0000000 #define SYSCON_LENGTH 0x100 ? > > #define SYSCON_CPU_CTRL 0x58 > > void __init microwatt_init_smp(void) > { > volatile unsigned char __iomem *syscon; > int ncpus; > int timeout; > > syscon =3D early_ioremap(SYSCON_BASE, 0x100); ioremap is not up by SMP init time? I always have to trawl through init spaghetti to work it out. I guess it's early SMP init. > if (syscon =3D=3D NULL) { > pr_err("Failed to map SYSCON\n"); > return; > } > ncpus =3D (readl(syscon + SYSCON_CPU_CTRL) >> 8) & 0xff; > if (ncpus < 2) > goto out; > > smp_ops =3D µwatt_smp_ops; > > /* > * Write two instructions at location 0: > * mfspr r3, PIR > * b __secondary_hold > */ > *(unsigned int *)KERNELBASE =3D 0x7c7ffaa6; > *(unsigned int *)(KERNELBASE+4) =3D 0x4800005c; Could move constants to PPC_INST_ ? > > /* enable the other CPUs, they start at location 0 */ > writel((1ul << ncpus) - 1, syscon + SYSCON_CPU_CTRL); > > timeout =3D 10000; > while (!__secondary_hold_acknowledge) { > if (--timeout =3D=3D 0) > break; > barrier(); > } > > out: > early_iounmap((void *)syscon, 0x100); > } Looks okay otherwise. Thanks, Nick