From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id F0C26B7DC2 for ; Tue, 18 May 2010 04:31:02 +1000 (EST) Subject: Re: [PATCH v2] powerpc/e500mc: Implement machine check handler. Mime-Version: 1.0 (Apple Message framework v1078) Content-Type: text/plain; charset=us-ascii From: Kumar Gala In-Reply-To: <1270705102-18343-1-git-send-email-galak@kernel.crashing.org> Date: Mon, 17 May 2010 13:30:57 -0500 Message-Id: References: <1270705102-18343-1-git-send-email-galak@kernel.crashing.org> To: Kumar Gala Cc: Scott Wood , linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Apr 8, 2010, at 12:38 AM, Kumar Gala wrote: > From: Scott Wood >=20 > Most of the MSCR bit assigments are different in e500mc versus > e500, and they are now write-one-to-clear. >=20 > Some e500mc machine check conditions are made recoverable (as long as > they aren't stuck on), most notably L1 instruction cache parity = errors. >=20 > Signed-off-by: Scott Wood > Signed-off-by: Kumar Gala > --- > * Fix build error >=20 > arch/powerpc/include/asm/cputable.h | 1 + > arch/powerpc/include/asm/reg_booke.h | 33 +++++++++---- > arch/powerpc/kernel/cputable.c | 2 +- > arch/powerpc/kernel/traps.c | 88 = +++++++++++++++++++++++++++++++++- > 4 files changed, 112 insertions(+), 12 deletions(-) applied to next - k=