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* [PATCH 4/10 v2] Guard L3CR references with CPU_FTR_L3CR.
@ 2006-06-08 21:58 Jon Loeliger
  2006-06-09  4:17 ` Benjamin Herrenschmidt
  0 siblings, 1 reply; 4+ messages in thread
From: Jon Loeliger @ 2006-06-08 21:58 UTC (permalink / raw)
  To: linuxppc-dev@ozlabs.org


Signed-off-by: Jon Loeliger <jdl@freescale.com>

---

 arch/powerpc/kernel/cpu_setup_6xx.S |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)


diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index 55ed771..365381f 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -210,9 +210,11 @@ setup_745x_specifics:
 	 * the firmware. If any, we disable NAP capability as
 	 * it's known to be bogus on rev 2.1 and earlier
 	 */
+BEGIN_FTR_SECTION
 	mfspr	r11,SPRN_L3CR
 	andis.	r11,r11,L3CR_L3E@h
 	beq	1f
+END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
 	lwz	r6,CPU_SPEC_FEATURES(r5)
 	andi.	r0,r6,CPU_FTR_L3_DISABLE_NAP
 	beq	1f

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH 4/10 v2] Guard L3CR references with CPU_FTR_L3CR.
  2006-06-08 21:58 [PATCH 4/10 v2] Guard L3CR references with CPU_FTR_L3CR Jon Loeliger
@ 2006-06-09  4:17 ` Benjamin Herrenschmidt
  2006-06-09 16:00   ` Jon Loeliger
  0 siblings, 1 reply; 4+ messages in thread
From: Benjamin Herrenschmidt @ 2006-06-09  4:17 UTC (permalink / raw)
  To: Jon Loeliger; +Cc: linuxppc-dev@ozlabs.org

On Thu, 2006-06-08 at 16:58 -0500, Jon Loeliger wrote:
> Signed-off-by: Jon Loeliger <jdl@freescale.com>

Beware about this one... the CPU setup code might run before the feature
fixup in the future... you should probably do a separate setup function
for your core or go read the feature bit directly in the structure
rather than relying on the fixup mecanism.

> ---
> 
>  arch/powerpc/kernel/cpu_setup_6xx.S |    2 ++
>  1 files changed, 2 insertions(+), 0 deletions(-)
> 
> 
> diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
> index 55ed771..365381f 100644
> --- a/arch/powerpc/kernel/cpu_setup_6xx.S
> +++ b/arch/powerpc/kernel/cpu_setup_6xx.S
> @@ -210,9 +210,11 @@ setup_745x_specifics:
>  	 * the firmware. If any, we disable NAP capability as
>  	 * it's known to be bogus on rev 2.1 and earlier
>  	 */
> +BEGIN_FTR_SECTION
>  	mfspr	r11,SPRN_L3CR
>  	andis.	r11,r11,L3CR_L3E@h
>  	beq	1f
> +END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
>  	lwz	r6,CPU_SPEC_FEATURES(r5)
>  	andi.	r0,r6,CPU_FTR_L3_DISABLE_NAP
>  	beq	1f
> 
> 
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 4/10 v2] Guard L3CR references with CPU_FTR_L3CR.
  2006-06-09  4:17 ` Benjamin Herrenschmidt
@ 2006-06-09 16:00   ` Jon Loeliger
  2006-06-09 22:07     ` Benjamin Herrenschmidt
  0 siblings, 1 reply; 4+ messages in thread
From: Jon Loeliger @ 2006-06-09 16:00 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev@ozlabs.org

So, like, the other day Benjamin Herrenschmidt mumbled:
> On Thu, 2006-06-08 at 16:58 -0500, Jon Loeliger wrote:
> > Signed-off-by: Jon Loeliger <jdl@freescale.com>
> 
> Beware about this one... the CPU setup code might run before the feature
> fixup in the future...
> ...
> or go read the feature bit directly in the structure
> rather than relying on the fixup mecanism.

OK.

> you should probably do a separate setup function for your core

Truth be told, this is a pretty generic fix for other
parts as well. If I recall correctly, 7447, 7448, 7448A and 7450
as well as the new 8641 now.

But I can certainly introduce a new setup function here
if you think that is the right thing to do.  No problem.

Thanks,
jdl

> > --- a/arch/powerpc/kernel/cpu_setup_6xx.S
> > +++ b/arch/powerpc/kernel/cpu_setup_6xx.S

> > +BEGIN_FTR_SECTION
> >  	mfspr	r11,SPRN_L3CR
> >  	andis.	r11,r11,L3CR_L3E@h
> >  	beq	1f
> > +END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
> >  	lwz	r6,CPU_SPEC_FEATURES(r5)
> >  	andi.	r0,r6,CPU_FTR_L3_DISABLE_NAP
> >  	beq	1f

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 4/10 v2] Guard L3CR references with CPU_FTR_L3CR.
  2006-06-09 16:00   ` Jon Loeliger
@ 2006-06-09 22:07     ` Benjamin Herrenschmidt
  0 siblings, 0 replies; 4+ messages in thread
From: Benjamin Herrenschmidt @ 2006-06-09 22:07 UTC (permalink / raw)
  To: Jon Loeliger; +Cc: linuxppc-dev@ozlabs.org

On Fri, 2006-06-09 at 11:00 -0500, Jon Loeliger wrote:
> So, like, the other day Benjamin Herrenschmidt mumbled:
> > On Thu, 2006-06-08 at 16:58 -0500, Jon Loeliger wrote:
> > > Signed-off-by: Jon Loeliger <jdl@freescale.com>
> > 
> > Beware about this one... the CPU setup code might run before the feature
> > fixup in the future...
> > ...
> > or go read the feature bit directly in the structure
> > rather than relying on the fixup mecanism.
> 
> OK.
> 
> > you should probably do a separate setup function for your core
> 
> Truth be told, this is a pretty generic fix for other
> parts as well. If I recall correctly, 7447, 7448, 7448A and 7450
> as well as the new 8641 now.
> 
> But I can certainly introduce a new setup function here
> if you think that is the right thing to do.  No problem.

No, go for the generic fix.

Ben.

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2006-06-09 22:08 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2006-06-08 21:58 [PATCH 4/10 v2] Guard L3CR references with CPU_FTR_L3CR Jon Loeliger
2006-06-09  4:17 ` Benjamin Herrenschmidt
2006-06-09 16:00   ` Jon Loeliger
2006-06-09 22:07     ` Benjamin Herrenschmidt

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