P1020 implementation crashes with "Data Cache Parity Error" on board derived from Freescale P1020Wlan eval board.

[John Clark <jeclark2006@aim.com>]

I have a problem when booting the linux kernel using two cores of the =
P1020 Freescale ppc implementation.

I have found on the Freescale site one other person who has a similar =
problem and we both are using designed driver from the P1020Wlan 'eval' =
board.

I would like to know if others have this 'problem', and used the =
P1020Wlan as their hardware starting point, and what they did to =
overcome this problem.

Single core works fine. Further the original P1020Wlan board boots my =
'new' kernel, 3.10.15 from OpenWRT sources, 'just fine'.

The problem may be that we used a different DDR3 chip than the original =
eval, and some subtle difference in timing that needs some 'adjustment' =
has eluded me.

Thanks for any info/insight,

John Clark.