From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTP id 39BA8DDDFD for ; Thu, 22 Nov 2007 02:33:27 +1100 (EST) Message-Id: From: Kumar Gala To: Timur Tabi In-Reply-To: <474447EF.8080405@freescale.com> Content-Type: text/plain; charset=US-ASCII; format=flowed; delsp=yes Mime-Version: 1.0 (Apple Message framework v915) Subject: Re: [PATCH 3/3] [POWERPC] Add docs for Freescale DMA & DMA channel device tree nodes Date: Wed, 21 Nov 2007 09:33:05 -0600 References: <474447EF.8080405@freescale.com> Cc: linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Nov 21, 2007, at 8:59 AM, Timur Tabi wrote: > Kumar Gala wrote: > >> + * Freescale 83xx DMA Controller >> + >> + Freescale PowerPC 83xx have on chip general purpose DMA >> controllers. >> + >> + Required properties: >> + >> + - compatible : compatible list, contains 2 entries, >> first is >> + "fsl,CHIP-dma", where CHIP is the processor >> + (mpc8349, mpc8360, etc.) and the second is >> + "fsl,elo-dma" > > Shouldn't we put some text somewhere that we're calling it the Elo > controller even though that word isn't used in the reference manual? we don't really have a place to put that. its effectively documented right here. > > >> + * Freescale 85xx DMA Controller > > And 86xx. yes, true. >> + >> + Freescale PowerPC 85xx have on chip general purpose DMA >> controllers. >> + >> + Required properties: >> + >> + - compatible : compatible list, contains 2 entries, >> first is >> + "fsl,CHIP-dma", where CHIP is the processor >> + (mpc8540, mpc8540, etc.) and the second is >> + "fsl,eloplus-dma" >> + - reg : > status reg> >> + - ranges : Should be defined as specified in 1) to describe >> the >> + DMA controller channels. >> + >> + - DMA channel nodes: >> + - compatible : compatible list, contains 2 entries, >> first is >> + "fsl,CHIP-dma-channel", where CHIP is the processor >> + (mpc8540, mpc8560, etc.) and the second is >> + "fsl,eloplus-dma-channel" >> + - reg : >> + - interrupts : >> + - interrupt-parent : optional, if needed for interrupt mapping >> + >> + Example: >> + dma@21000 { > > Shouldn't this be dma@21300? its an example that has not basis is reality :) >> + #address-cells = <1>; >> + #size-cells = <1>; >> + compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; >> + reg = <21300 4>; >> + ranges = <0 21100 200>; >> + dma-channel@0 { >> + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma- >> channel"; >> + reg = <0 80>; >> + interrupt-parent = <&mpic>; >> + interrupts = <14 2>; >> + }; > > The DMA controller and the DMA channels need a "device-id", so that > they can be identified by number. Some peripherals, like the SSI, > can only use the controller and channel number. This is what I have > in my 8610 DTS: Why not use reg for this? I don't see any reason to add another "unique id" when there is already one. > dma@21300 { > #address-cells = <1>; > #size-cells = <1>; > compatible = "fsl,mpc8610-dma", "fsl,mpc8540- > dma"; > --> device-id = <0>; > reg = <21300 4>; /* DMA general status > register */ > ranges = <0 21100 200>; > > dma-channel@0 { > compatible = "fsl,mpc8610-dma-channel", > "fsl,mpc8540-dma-channel"; > --> device-id = <0>; > reg = <0 80>; > interrupt-parent = <&mpic>; > interrupts = <14 2>; > }; > - k