From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTP id C9D0FDDF7A for ; Thu, 28 Jun 2007 07:09:46 +1000 (EST) In-Reply-To: <0639caa4f420578b671c9e2f9713ba39@kernel.crashing.org> References: <11829070051484-git-send-email-galak@kernel.crashing.org> <11829070063989-git-send-email-galak@kernel.crashing.org> <11829070073637-git-send-email-galak@kernel.crashing.org> <11829070091056-git-send-email-galak@kernel.crashing.org> <11829070102887-git-send-email-galak@kernel.crashing.org> <11829070111239-git-send-email-galak@kernel.crashing.org> <1182907013252-git-send-email-galak@kernel.crashing.org> <1182907014549-git-send-email-galak@kernel.crashing.org> <1182907015126-git-send-email-galak@kernel.crashing.org> <11829070192461-git-send-email-galak@kernel.crashing.org> <8fa84ed4810eb9aca18739bf709e71d9@kernel.crashing.org> <41E15EC0-D16E-4A9F-BCA8-1E126F6D95A7@kernel.crashing.org> <0639caa4f420578b671c9e2f9713ba39@kernel.crashing.org> Mime-Version: 1.0 (Apple Message framework v752.2) Content-Type: text/plain; charset=US-ASCII; delsp=yes; format=flowed Message-Id: From: Kumar Gala Subject: Re: [PATCH 09/15] [POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file. Date: Wed, 27 Jun 2007 16:08:52 -0500 To: Segher Boessenkool Cc: linuxppc-dev list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Jun 27, 2007, at 3:57 PM, Segher Boessenkool wrote: >>>>> - ranges = <0 f8000000 00100000>; >>>>> - reg = ; // CCSRBAR 1M >>>>> + ranges = <00001000 f8001000 000ff000 >>>> [...] >>>>> + reg = ; // CCSRBAR >>>> >>>> This can't be right, and I suspect it will break any kernel >>>> access to >>>> the first 0x1000 bytes of the CCSR_BAR space. reg should actually >>>> describe the register space of the SOC. If ranges needs to specify >>>> that, too, they should be able to be redundant. But this looks >>>> like >>>> a big hack, to me. Am I missing something? >>> >>> "reg" and "ranges" can never overlap really. >>> >>> Is this the special case where the PHB is visible in >>> PCI configuration space? >>> >>> Or, please explain what CCSR_BAR is... >> >> Its a 1M MMIO register space on the SOC (all device registers on >> the SOC live there). > > Okay, so it has nothing to do with PCI configuration space? correct > There is "BAR" in the name, so it is a movable range? Where > is the base address set? in a MMIO register in the space itself. > What is the relationship between (in the example) the address > ranges x'f800_0000+1000 and x'f800_1000+ff000? uugh, not sure what that's all about. - k