From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ea0-x22f.google.com (mail-ea0-x22f.google.com [IPv6:2a00:1450:4013:c01::22f]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (not verified)) by ozlabs.org (Postfix) with ESMTPS id DDBB02C0109 for ; Tue, 19 Nov 2013 21:20:42 +1100 (EST) Received: by mail-ea0-f175.google.com with SMTP id z10so797985ead.34 for ; Tue, 19 Nov 2013 02:20:33 -0800 (PST) Content-Type: multipart/alternative; boundary="Apple-Mail=_03A9CE99-1647-436D-937E-C579926E4226" Mime-Version: 1.0 (Mac OS X Mail 7.0 \(1822\)) Subject: Re: Problem reading and programming memory location... From: neorf3k In-Reply-To: <20131116152933.276f9939@crub> Date: Tue, 19 Nov 2013 11:20:24 +0100 Message-Id: References: <985685C7-0122-4D45-96D1-4412E9774A5D@gmail.com> <20131113083259.1b69ed18@crub> <50EBA514-5BB1-40B3-B27B-309A829D2E05@gmail.com> <20131113190606.2a5d08fb@crub> <5DC55309-D920-44CE-8F89-AB7FA6BD383A@gmail.com> <20131114100917.31f674d7@crub> <51E043E6-19FB-4655-9B3C-3B81F868DC47@gmail.com> <20131116152933.276f9939@crub> To: Anatolij Gustschin Cc: Linux Ppc Dev List Dev List List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , --Apple-Mail=_03A9CE99-1647-436D-937E-C579926E4226 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=windows-1252 Hello Anatolij, this is our code, used at University, but again it = doesn=92t work=85 How i told, the only information we have about that reg are: Chip select 4 specification: Lp_cs4 bus size: 8 bit bus control: 2 wait state R/W ACK disabled size allocated: 4 KByte Our Register 8 bit LP_cs4 (we want to write) cs4 offset: 0x001 The code we have used: =97=97 #define MBAR_BASE 0xF0000000 #define MALab_MM_START 0x10020000U #define MALab_MM_END 0x10030000U #define MALab_MM_SIZE 0x00010000U #define MALab_DEVICE_NAME "MALab" int init_module(void) { ... u16 cs4_start_value; u16 cs4_stop_value; u32 cs4_enable_value; u32 cs0_reg_value; u32 cs3_reg_value; u32 ipbi_cr_value; u32 cs_ctrl_reg_value; u8 rvoice_ioaddr_value; =20 =20 // reserve a page of memory for our hardware /proc/iomem if ( check_region(MALab_MM_START,MALab_MM_SIZE) ) { printk (KERN_ALERT "LED init_module: memory already in use\n"); return -EBUSY; } =20 request_region(MALab_MM_START,MALab_MM_SIZE,MALab_DEVICE_NAME); =20 void __iomem *reg_base =3D ioremap(MBAR_BASE, 0x400); void __iomem *cs0_reg =3D reg_base + 0x0300; void __iomem *cs1_reg =3D reg_base + 0x0304; void __iomem *cs2_reg =3D reg_base + 0x0308; void __iomem *cs3_reg =3D reg_base + 0x030C; void __iomem *ipbi_cr =3D reg_base + 0x0054; void __iomem *cs4_start =3D reg_base + 0x0024; void __iomem *cs4_stop =3D reg_base + 0x0028; void __iomem *cs4_enable =3D reg_base + 0x0310; void __iomem *cs_ctrl_reg =3D reg_base + 0x0318; void __iomem *rvoice_ioaddr =3D ioremap ((volatile unsigned = long)(MALab_MM_START), MALab_MM_SIZE); =20 printk(KERN_ALERT =93r_ioaddr: 0x%08x\n", (u32)rvoice_ioaddr); =20 //Chip Select 0/Boot Configuration Register: CE=3D0 cs0_reg_value =3Din_be32(cs0_reg); out_be32(cs0_reg, (cs0_reg_value &=3D ~0x00010000)); =20 //Chip Select 3 Configuration Register: CE=3D0 cs3_reg_value =3Din_be32(cs3_reg); out_be32(cs3_reg, (cs3_reg_value &=3D ~0x00010000)); =20 //enable LocalBus chip select CS4 to hit on our address range ipbi_cr_value=3Din_be32(ipbi_cr); out_be32(ipbi_cr, (ipbi_cr_value &=3D 0x00100001)); out_be32(ipbi_cr, (ipbi_cr_value |=3D 0x00100001)); out_be16(cs4_start+2, MALab_MM_START >>16); out_be16(cs4_stop+2, MALab_MM_END >>16); // LocalBus Chip Select 4 Configuration Register out_be32(cs4_enable, 0x0002DC00); =20 //Enable Chip Select Control Register cs_ctrl_reg_value=3Din_be32(cs_ctrl_reg); out_be32(cs_ctrl_reg, (cs_ctrl_reg_value |=3D 0x01000000)); =20 //start solution A rvoice_ioaddr_value=3Din_8(rvoice_ioaddr); rvoice_ioaddr_value=3D0xAA; printk("A r_ioaddr_value---before : %x \n",in_8(rvoice_ioaddr)); =20 out_8(rvoice_ioaddr, rvoice_ioaddr_value); =20 printk("A r_ioaddr_value---after : %x \n",in_8(rvoice_ioaddr)); //end solution A =20 //start solution B *(volatile u8 *)rvoice_ioaddr =3D 0xAA; printk("\n B r_ioaddr_value %x\n",*(volatile u8 *)rvoice_ioaddr); //end solution B =20 ... } =97=97 the result is: rvoice_ioaddr: 0xc9080000 A rvoice_ioaddr_value---before : 10=20 A rvoice_ioaddr_value---after : 10=20 B rvoice_ioaddr_value 10 =97=97 we found some information on this post: = http://linuxppc.10917.n7.nabble.com/MPC5200b-kernel-module-memory-mapping-= td59862.html Thanks again=85 Lorenzo --Apple-Mail=_03A9CE99-1647-436D-937E-C579926E4226 Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset=windows-1252 Hello Anatolij, this is our = code, used at University, but again it doesn=92t = work=85

How i told, the only information we have = about that reg are:

Chip select 4 = specification:
Lp_cs4
bus size: 8 bit
bus = control: 2 wait state R/W ACK disabled
size allocated: 4 = KByte

Our Register 8 bit LP_cs4 (we want to = write)

cs4 offset: = 0x001

The code we have = used:

=97=97
#define MBAR_BASE       0xF0000000
#define = MALab_MM_START = 0x10020000U
#define MALab_MM_END 0x10030000U
#define = MALab_MM_SIZE = 0x00010000U

#define = MALab_DEVICE_NAME= "MALab"

int = init_module(void) { ...
  =   u16 cs4_start_value;
    u16 cs4_stop_value;
  =   u32 cs4_enable_value;
    u32 cs0_reg_value;
  =   u32 cs3_reg_value;
    u32 ipbi_cr_value;
  =   u32 cs_ctrl_reg_value;
    u8 rvoice_ioaddr_value;

    

    

    // reserve = a page of memory for our hardware /proc/iomem
    if ( = check_region(MALab_MM_START,MALab_MM_SIZE) ) {
        printk = (KERN_ALERT "LED init_module: memory already in use\n");
        return -EBUSY;
    }

    

  =   = request_region(MALab_MM_START,MALab_MM_SIZE,MALab_DEVICE_NAME);

    

  =   void __iomem *reg_base =3D = ioremap(MBAR_BASE, 0x400);
    void __iomem *cs0_reg   =3D reg_base + 0x0300;
    void __iomem *cs1_reg   =3D reg_base + 0x0304;
    void __iomem *cs2_reg   =3D reg_base + 0x0308;
    void __iomem *cs3_reg   =3D reg_base + 0x030C;
    void __iomem *ipbi_cr =3D reg_base + 0x0054;
    void __iomem *cs4_start  =3D reg_base + 0x0024;
    void __iomem *cs4_stop   =3D reg_base + 0x0028;
    void __iomem *cs4_enable   =3D reg_base + 0x0310;
    void __iomem *cs_ctrl_reg   =3D reg_base + 0x0318;
    void __iomem *rvoice_ioaddr   =3D ioremap ((volatile unsigned long)(MALab_MM_START), MALab_MM_SIZE);

    

    printk(KERN_ALERT =93r_ioaddr: 0x%08x\n", (u32)rvoice_ioaddr);

    

    //Chip = Select 0/Boot Configuration Register: CE=3D0
    cs0_reg_value = =3Din_be32(cs0_reg);
    out_be32(cs0_reg, (cs0_reg_value = &=3D ~0x00010000));

    

    //Chip = Select 3 Configuration Register: CE=3D0
    cs3_reg_value = =3Din_be32(cs3_reg);
    out_be32(cs3_reg, (cs3_reg_value = &=3D ~0x00010000));

    

    //enable = LocalBus chip select CS4 to hit on our address range
  =   ipbi_cr_value=3Din_be32(ipbi_cr);
    out_be32(ipbi_cr, = (ipbi_cr_value &=3D 0x00100001));
    out_be32(ipbi_cr, = (ipbi_cr_value |=3D 0x00100001));
    out_be16(cs4_start+2, MALab_MM_START >>16);
    = out_be16(cs4_stop+2, MALab_MM_END = >>16);

    // LocalBus Chip Select 4 Configuration = Register
    out_be32(cs4_enable, 0x0002DC00);

    

    //Enable Chip Select = Control Register
    = cs_ctrl_reg_value=3Din_be32(cs_ctrl_reg);
    = out_be32(cs_ctrl_reg, (cs_ctrl_reg_value |=3D 0x01000000));

    

    //start solution = A
    rvoice_ioaddr_value=3Din_8(rvoice_ioaddr);
  =   rvoice_ioaddr_value=3D0xAA;
    printk("A r_ioaddr_value---before : %x = \n",in_8(rvoice_ioaddr));

    

  =   out_8(rvoice_ioaddr, rvoice_ioaddr_value);

    

    = printk("A r_ioaddr_value---after : %x \n",in_8(rvoice_ioaddr));
    //end solution A

    

    //start = solution B
    *(volatile = u8 *)rvoice_ioaddr =3D 0xAA;
    printk("\n B r_ioaddr_value %x\n",*(volatile u8 *)rvoice_ioaddr);
    //end solution B

    

    ... = }
=97=97

the result = is:

rvoice_ioaddr: 0xc9080000
A = rvoice_ioaddr_value---before : 10 
A = rvoice_ioaddr_value---after : 10 
B rvoice_ioaddr_value = 10
=97=97


Thanks = again=85

Lorenzo

= --Apple-Mail=_03A9CE99-1647-436D-937E-C579926E4226--