[PATCH v2 1/4] fsl_rio: fix compile errors

[PATCH v2 1/4] fsl_rio: fix compile errors

[Li Yang]

Fixes the following compile problem on E500 platforms:
arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared (first use in this function)

Also fixes the compile problem on non-E500 platforms.

Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/sysdev/fsl_rio.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 30e1626..f908ba6 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -240,12 +240,13 @@ struct rio_priv {
 
 static void __iomem *rio_regs_win;
 
+#ifdef CONFIG_E500
 static int (*saved_mcheck_exception)(struct pt_regs *regs);
 
 static int fsl_rio_mcheck_exception(struct pt_regs *regs)
 {
 	const struct exception_table_entry *entry = NULL;
-	unsigned long reason = (mfspr(SPRN_MCSR) & MCSR_MASK);
+	unsigned long reason = mfspr(SPRN_MCSR);
 
 	if (reason & MCSR_BUS_RBERR) {
 		reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
@@ -269,6 +270,7 @@ static int fsl_rio_mcheck_exception(struct pt_regs *regs)
 	else
 		return cur_cpu_spec->machine_check(regs);
 }
+#endif
 
 /**
  * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
@@ -1517,8 +1519,10 @@ int fsl_rio_setup(struct of_device *dev)
 	fsl_rio_doorbell_init(port);
 	fsl_rio_port_write_init(port);
 
+#ifdef CONFIG_E500
 	saved_mcheck_exception = ppc_md.machine_check_exception;
 	ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
+#endif
 	/* Ensure that RFXE is set */
 	mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
 
-- 
1.6.4

[PATCH v2 2/4] fsl_rio: fix machine check exception for e500mc

[Li Yang]

The original code only covers e500 v1/v2.

Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/sysdev/fsl_rio.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index f908ba6..954a754 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -248,7 +248,8 @@ static int fsl_rio_mcheck_exception(struct pt_regs *regs)
 	const struct exception_table_entry *entry = NULL;
 	unsigned long reason = mfspr(SPRN_MCSR);
 
-	if (reason & MCSR_BUS_RBERR) {
+	/* covers both e500v1/v2 and e500mc */
+	if (reason & (MCSR_BUS_RBERR | MCSR_LD)) {
 		reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
 		if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) {
 			/* Check if we are prepared to handle this fault */
-- 
1.6.4

[PATCH v2 3/4] powerpc: add e500 HID1 bit definition

[Li Yang]

Also make 74xx HID1 definition conditional.

Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/include/asm/reg.h       |    2 ++
 arch/powerpc/include/asm/reg_booke.h |   16 ++++++++++++++++
 2 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index d62fdf4..235d356 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -283,6 +283,7 @@
 #define HID0_NOPTI	(1<<0)		/* No-op dcbt and dcbst instr. */
 
 #define SPRN_HID1	0x3F1		/* Hardware Implementation Register 1 */
+#ifdef CONFIG_6xx
 #define HID1_EMCP	(1<<31)		/* 7450 Machine Check Pin Enable */
 #define HID1_DFS	(1<<22)		/* 7447A Dynamic Frequency Scaling */
 #define HID1_PC0	(1<<16)		/* 7450 PLL_CFG[0] */
@@ -292,6 +293,7 @@
 #define HID1_SYNCBE	(1<<11)		/* 7450 ABE for sync, eieio */
 #define HID1_ABE	(1<<10)		/* 7450 Address Broadcast Enable */
 #define HID1_PS		(1<<16)		/* 750FX PLL selection */
+#endif
 #define SPRN_HID2	0x3F8		/* Hardware Implementation Register 2 */
 #define SPRN_HID2_GEKKO	0x398		/* Gekko HID2 Register */
 #define SPRN_IABR	0x3F2	/* Instruction Address Breakpoint Register */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 2360317..6d393f7 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -245,6 +245,22 @@
 					store or cache line push */
 #endif
 
+/* Bit definitions for the HID1 */
+#ifdef CONFIG_E500
+#ifndef CONFIG_PPC_E500MC
+/* e500v1/v2 */
+#define HID1_PLL_CFG_MASK 0xfc000000UL	/* PLL_CFG input pins */
+#define HID1_RFXE	0x00020000UL	/* Read fault exception enable */
+#define HID1_R1DPE	0x00008000UL	/* R1 data bus parity enable */
+#define HID1_R2DPE	0x00004000UL	/* R2 data bus parity enable */
+#define HID1_ASTME	0x00002000UL	/* Address bus streaming mode enable */
+#define HID1_ABE	0x00001000UL	/* Address broadcast enable */
+#define HID1_MPXTT	0x00000400UL	/* MPX re-map transfer type */
+#define HID1_ATS	0x00000080UL	/* Atomic status */
+#define HID1_MID_MASK	0x0000000fUL	/* MID input pins */
+#endif
+#endif
+
 /* Bit definitions for the DBSR. */
 /*
  * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.
-- 
1.6.4

[PATCH v2 4/4] fsl_rio: fix non-standard HID1 register access

[Li Yang]

The access to HID1 register is only legitimate for e500 v1/v2 cores.
Also fixes magic number.

Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/sysdev/fsl_rio.c |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 954a754..aa9a21d 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -1523,9 +1523,12 @@ int fsl_rio_setup(struct of_device *dev)
 #ifdef CONFIG_E500
 	saved_mcheck_exception = ppc_md.machine_check_exception;
 	ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
-#endif
-	/* Ensure that RFXE is set */
-	mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
+	
+#ifndef CONFIG_PPC_E500MC
+	/* Ensure that RFXE is set on e500 v1/v2 */
+	mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | HID1_RFXE));
+#endif /* !PPC_E500MC */
+#endif /* E500 */
 
 	return 0;
 err:
-- 
1.6.4

Re: [PATCH v2 1/4] fsl_rio: fix compile errors

[Kumar Gala]

On Jun 18, 2010, at 1:24 AM, Li Yang wrote:

> Fixes the following compile problem on E500 platforms:
> arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
> arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared =
(first use in this function)
>=20
> Also fixes the compile problem on non-E500 platforms.
>=20
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_rio.c |    6 +++++-
> 1 files changed, 5 insertions(+), 1 deletions(-)

I'm confused is this handler not relevant for e500MC?  The 2nd patch =
makes me thing it is.
>=20
> diff --git a/arch/powerpc/sysdev/fsl_rio.c =
b/arch/powerpc/sysdev/fsl_rio.c
> index 30e1626..f908ba6 100644
> --- a/arch/powerpc/sysdev/fsl_rio.c
> +++ b/arch/powerpc/sysdev/fsl_rio.c
> @@ -240,12 +240,13 @@ struct rio_priv {
>=20
> static void __iomem *rio_regs_win;
>=20
> +#ifdef CONFIG_E500
> static int (*saved_mcheck_exception)(struct pt_regs *regs);
>=20
> static int fsl_rio_mcheck_exception(struct pt_regs *regs)
> {
> 	const struct exception_table_entry *entry =3D NULL;
> -	unsigned long reason =3D (mfspr(SPRN_MCSR) & MCSR_MASK);
> +	unsigned long reason =3D mfspr(SPRN_MCSR);
>=20
> 	if (reason & MCSR_BUS_RBERR) {
> 		reason =3D in_be32((u32 *)(rio_regs_win + =
RIO_LTLEDCSR));
> @@ -269,6 +270,7 @@ static int fsl_rio_mcheck_exception(struct pt_regs =
*regs)
> 	else
> 		return cur_cpu_spec->machine_check(regs);
> }
> +#endif
>=20
> /**
>  * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
> @@ -1517,8 +1519,10 @@ int fsl_rio_setup(struct of_device *dev)
> 	fsl_rio_doorbell_init(port);
> 	fsl_rio_port_write_init(port);
>=20
> +#ifdef CONFIG_E500
> 	saved_mcheck_exception =3D ppc_md.machine_check_exception;
> 	ppc_md.machine_check_exception =3D fsl_rio_mcheck_exception;
> +#endif
> 	/* Ensure that RFXE is set */
> 	mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
>=20
> --=20
> 1.6.4

Re: [PATCH v2 1/4] fsl_rio: fix compile errors

[Scott Wood]

On Thu, 5 Aug 2010 12:39:48 -0500
Kumar Gala <galak@kernel.crashing.org> wrote:

> 
> On Jun 18, 2010, at 1:24 AM, Li Yang wrote:
> 
> > Fixes the following compile problem on E500 platforms:
> > arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
> > arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared (first use in this function)
> > 
> > Also fixes the compile problem on non-E500 platforms.
> > 
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > ---
> > arch/powerpc/sysdev/fsl_rio.c |    6 +++++-
> > 1 files changed, 5 insertions(+), 1 deletions(-)
> 
> I'm confused is this handler not relevant for e500MC?  The 2nd patch makes me thing it is.

It is, though it needs to use a different MCSR bit on e500mc.

Are you referring to the #ifdef CONFIG_E500?  CONFIG_PPC_E500MC depends
on CONFIG_E500...

-Scott

Re: [PATCH v2 1/4] fsl_rio: fix compile errors

[Kumar Gala]

On Aug 5, 2010, at 12:54 PM, Scott Wood wrote:

> On Thu, 5 Aug 2010 12:39:48 -0500
> Kumar Gala <galak@kernel.crashing.org> wrote:
>=20
>>=20
>> On Jun 18, 2010, at 1:24 AM, Li Yang wrote:
>>=20
>>> Fixes the following compile problem on E500 platforms:
>>> arch/powerpc/sysdev/fsl_rio.c: In function =
'fsl_rio_mcheck_exception':
>>> arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared =
(first use in this function)
>>>=20
>>> Also fixes the compile problem on non-E500 platforms.
>>>=20
>>> Signed-off-by: Li Yang <leoli@freescale.com>
>>> ---
>>> arch/powerpc/sysdev/fsl_rio.c |    6 +++++-
>>> 1 files changed, 5 insertions(+), 1 deletions(-)
>>=20
>> I'm confused is this handler not relevant for e500MC?  The 2nd patch =
makes me thing it is.
>=20
> It is, though it needs to use a different MCSR bit on e500mc.
>=20
> Are you referring to the #ifdef CONFIG_E500?  CONFIG_PPC_E500MC =
depends
> on CONFIG_E500...

Ah, that makes a bit more sense now.

- k=

Re: [PATCH v2 1/4] fsl_rio: fix compile errors

[Kumar Gala]

On Jun 18, 2010, at 1:24 AM, Li Yang wrote:

> Fixes the following compile problem on E500 platforms:
> arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
> arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared =
(first use in this function)
>=20
> Also fixes the compile problem on non-E500 platforms.
>=20
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_rio.c |    6 +++++-
> 1 files changed, 5 insertions(+), 1 deletions(-)

applied to merge

- k=

Re: [PATCH v2 1/4] fsl_rio: fix compile errors

[Li Yang]

On Wed, Sep 1, 2010 at 5:39 AM, Kumar Gala <galak@kernel.crashing.org> wrot=
e:
>
> On Jun 18, 2010, at 1:24 AM, Li Yang wrote:
>
>> Fixes the following compile problem on E500 platforms:
>> arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
>> arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared (first =
use in this function)
>>
>> Also fixes the compile problem on non-E500 platforms.
>>
>> Signed-off-by: Li Yang <leoli@freescale.com>
>> ---
>> arch/powerpc/sysdev/fsl_rio.c | =C2=A0 =C2=A06 +++++-
>> 1 files changed, 5 insertions(+), 1 deletions(-)
>
> applied to merge

Thanks, Kumar.

How about the other ones in the series?

- Leo

Re: [PATCH v2 1/4] fsl_rio: fix compile errors

[Kumar Gala]

On Aug 31, 2010, at 10:40 PM, Li Yang wrote:

> On Wed, Sep 1, 2010 at 5:39 AM, Kumar Gala <galak@kernel.crashing.org> =
wrote:
>>=20
>> On Jun 18, 2010, at 1:24 AM, Li Yang wrote:
>>=20
>>> Fixes the following compile problem on E500 platforms:
>>> arch/powerpc/sysdev/fsl_rio.c: In function =
'fsl_rio_mcheck_exception':
>>> arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared =
(first use in this function)
>>>=20
>>> Also fixes the compile problem on non-E500 platforms.
>>>=20
>>> Signed-off-by: Li Yang <leoli@freescale.com>
>>> ---
>>> arch/powerpc/sysdev/fsl_rio.c |    6 +++++-
>>> 1 files changed, 5 insertions(+), 1 deletions(-)
>>=20
>> applied to merge
>=20
> Thanks, Kumar.
>=20
> How about the other ones in the series?

I want to rework how the whole RIO mcheck works and will do so for =
2.6.37.  Part of the problem I have is that we are ignoring the fact =
that this code isn't right for 8641 support of SRIO.

- k

RE: [PATCH v2 1/4] fsl_rio: fix compile errors

[Li Yang-R58472]

>Subject: Re: [PATCH v2 1/4] fsl_rio: fix compile errors
>
>
>On Aug 31, 2010, at 10:40 PM, Li Yang wrote:
>
>> On Wed, Sep 1, 2010 at 5:39 AM, Kumar Gala =
<galak@kernel.crashing.org>
>wrote:
>>>
>>> On Jun 18, 2010, at 1:24 AM, Li Yang wrote:
>>>
>>>> Fixes the following compile problem on E500 platforms:
>>>> arch/powerpc/sysdev/fsl_rio.c: In function =
'fsl_rio_mcheck_exception':
>>>> arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared
>(first use in this function)
>>>>
>>>> Also fixes the compile problem on non-E500 platforms.
>>>>
>>>> Signed-off-by: Li Yang <leoli@freescale.com>
>>>> ---
>>>> arch/powerpc/sysdev/fsl_rio.c |    6 +++++-
>>>> 1 files changed, 5 insertions(+), 1 deletions(-)
>>>
>>> applied to merge
>>
>> Thanks, Kumar.
>>
>> How about the other ones in the series?
>
>I want to rework how the whole RIO mcheck works and will do so for =
2.6.37.
>Part of the problem I have is that we are ignoring the fact that this =
code
>isn't right for 8641 support of SRIO.

Right.  So I protected the code with #ifdef CONFIG_E500.  The following =
patches in series enable it to be used by e500mc.  Having it to support =
all platforms is surely the best, but before that we can make it better. =
 And I believe they wouldn't get in the way of further MPC8641 support.

- Leo