MMU on the power pc 860

MMU on the power pc 860

[Muaddi, Cecilia]

Hi,

This might be a very dumb question, but I hope someone can give me some
insight and help.

I am porting the timeSys Linux to a custom Power PC 860 board.  Our board
currently runs
windRiver VxWorks.  I have modified the VxWorks bootrom to allow me to
download a motorola
hex record, and I have modified the timeSys bootcode
arch/ppc/boot/mbx/misc.c:decompress_kernel
to get the correct address of the vmlinux.gz in the hex record.  I got the
following information
on the serial port

Loading... S-Record:
        Module Name: ../images/zImage.srec
        Entry Location: 0x400000
Starting at 0x400000...

loaded at:     00400000 0040C30C
board data at: 004001C0 004001E4
relocated to:  0040C0E8 0040C10C
zimage at:     0040C30C 004BC440
avail ram:     004BD000 00800000

Linux/PPC load: console=ttyS0,9600
nfsroot=192.168.0.211:/exports/rpx860/2.4.7-t
imesys-3.1.254 ip=192.168.0.238
Uncompressing Linux... done.
Now booting the kernel

I was able to use the VisionICE BDM to single step, and see it does jump to
the address 0, and
begin execute the instruction in kernel/arch/ppc/kernel/head_8xx.S:_start

I think the MMU TLB setup I have is not exactly correct, since the vxWorks
BOOTROM does not
initialize any MMU registers.  Can someone tell me if I need to initialize
the M_TWB register for the
level one base register?  It looks like this register is never initialized.
Furthermore, what need
to be the value for this register?  My physical memory map consists of RAM
at location 0 to 0x1ffffff
and my IMMR is set to 0x2b00 0000

If M_TWB is mapped to some RAM location, will I be able to see the TLB
values at that location after i
issue the write to register MxRPN?

Your help is greatly appreciated.

Cecilia Muaddi

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: MMU on the power pc 860

[Wolfgang Denk]

Dear Cecilia,

in message <885489B3B89FB6449F93E525DF78777F06451E@srvnt506.ALLOPTIC.COM> you wrote:
>
> I am porting the timeSys Linux to a custom Power PC 860 board.  Our board
> currently runs
> windRiver VxWorks.  I have modified the VxWorks bootrom to allow me to
> download a motorola
> hex record, and I have modified the timeSys bootcode
> arch/ppc/boot/mbx/misc.c:decompress_kernel

This is the generic Linux bootstrap loader, it has nothing to do with
TimeSys.

> loaded at:     00400000 0040C30C
> board data at: 004001C0 004001E4
> relocated to:  0040C0E8 0040C10C
> zimage at:     0040C30C 004BC440
> avail ram:     004BD000 00800000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

This loos strange to me. Didn't you map RAM to 0x0000?

> I was able to use the VisionICE BDM to single step, and see it does jump to
> the address 0, and
> begin execute the instruction in kernel/arch/ppc/kernel/head_8xx.S:_start

You will not get far  with  the  Vision*;  better  use  a  tool  that
understands the MMU, like the Abatron BDI2000.

> I think the MMU TLB setup I have is not exactly correct, since the vxWorks
> BOOTROM does not
> initialize any MMU registers.  Can someone tell me if I need to initialize
> the M_TWB register for the

MMU should be switched off when starting Linux.

> to be the value for this register?  My physical memory map consists of RAM
> at location 0 to 0x1ffffff

This is not what I see above.

> and my IMMR is set to 0x2b00 0000

And this is plain wrong. The IMMR _must_ be mapped above 0xF0000000.



Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd@denx.de
Use C++ to confuse your enemies; use C to produce stable code.

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

RE: MMU on the power pc 860

[Joe Hamman]

Hi Cecilia,

The comment on the Vision* tools' MMU support is incorrect.  The visionICE II and visionPROBE II support up to four regions of
translation.  You need to enter the details manually:

BKM>CF MMU LINUX
BKM>CF MMUA C0000000 0 FF000000

Use the CF MMUL to list the translation table entries currently defined in the tool.  You can get the details from WRS.  This will
allow you to use visionCLICK (or SingleStep w/vision) to debug anything statically linked into the kernel, from address 0 through
init.

Unless you have specific reasons not to switch, I recommend using the U-Boot bootloader.

Regards,
Joe


-----Original Message-----
From: owner-linuxppc-embedded@lists.linuxppc.org
[mailto:owner-linuxppc-embedded@lists.linuxppc.org]On Behalf Of Wolfgang
Denk
Sent: Saturday, December 21, 2002 2:59 PM
To: Muaddi, Cecilia
Cc: 'linuxppc-embedded@lists.linuxppc.org'
Subject: Re: MMU on the power pc 860



Dear Cecilia,

in message <885489B3B89FB6449F93E525DF78777F06451E@srvnt506.ALLOPTIC.COM> you wrote:
>
> I am porting the timeSys Linux to a custom Power PC 860 board.  Our board
> currently runs
> windRiver VxWorks.  I have modified the VxWorks bootrom to allow me to
> download a motorola
> hex record, and I have modified the timeSys bootcode
> arch/ppc/boot/mbx/misc.c:decompress_kernel

This is the generic Linux bootstrap loader, it has nothing to do with
TimeSys.

> loaded at:     00400000 0040C30C
> board data at: 004001C0 004001E4
> relocated to:  0040C0E8 0040C10C
> zimage at:     0040C30C 004BC440
> avail ram:     004BD000 00800000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

This loos strange to me. Didn't you map RAM to 0x0000?

> I was able to use the VisionICE BDM to single step, and see it does jump to
> the address 0, and
> begin execute the instruction in kernel/arch/ppc/kernel/head_8xx.S:_start

You will not get far  with  the  Vision*;  better  use  a  tool  that
understands the MMU, like the Abatron BDI2000.

> I think the MMU TLB setup I have is not exactly correct, since the vxWorks
> BOOTROM does not
> initialize any MMU registers.  Can someone tell me if I need to initialize
> the M_TWB register for the

MMU should be switched off when starting Linux.

> to be the value for this register?  My physical memory map consists of RAM
> at location 0 to 0x1ffffff

This is not what I see above.

> and my IMMR is set to 0x2b00 0000

And this is plain wrong. The IMMR _must_ be mapped above 0xF0000000.



Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd@denx.de
Use C++ to confuse your enemies; use C to produce stable code.

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

RE: MMU on the power pc 860

[Muaddi, Cecilia]

which version of the visionClick you are using?  My vision click is version
7.4A, and the firware version for the visionICE II is vn1.5a. When I enter
the command you have recommended, I got syntax error

>BKM>CF MMU LINUX
!ERROR! - [msg31000] Syntax error in message cf mmu linux
>BKM>cf mmua
!ERROR! - [msg31000] Syntax error in message cf mmua
>BKM>
!ABORT! - [msg72000] User Command Abort
>BKM>

Thanks

Cecilia

-----Original Message-----
From: Joe Hamman [mailto:joe.hamman@embeddedspecialties.com]
Sent: Sunday, December 22, 2002 8:01 PM
To: Muaddi, Cecilia
Cc: linuxppc-embedded@lists.linuxppc.org
Subject: RE: MMU on the power pc 860


Hi Cecilia,

The comment on the Vision* tools' MMU support is incorrect.  The visionICE
II and visionPROBE II support up to four regions of
translation.  You need to enter the details manually:

BKM>CF MMU LINUX
BKM>CF MMUA C0000000 0 FF000000

Use the CF MMUL to list the translation table entries currently defined in
the tool.  You can get the details from WRS.  This will
allow you to use visionCLICK (or SingleStep w/vision) to debug anything
statically linked into the kernel, from address 0 through
init.

Unless you have specific reasons not to switch, I recommend using the U-Boot
bootloader.

Regards,
Joe


-----Original Message-----
From: owner-linuxppc-embedded@lists.linuxppc.org
[mailto:owner-linuxppc-embedded@lists.linuxppc.org]On Behalf Of Wolfgang
Denk
Sent: Saturday, December 21, 2002 2:59 PM
To: Muaddi, Cecilia
Cc: 'linuxppc-embedded@lists.linuxppc.org'
Subject: Re: MMU on the power pc 860



Dear Cecilia,

in message <885489B3B89FB6449F93E525DF78777F06451E@srvnt506.ALLOPTIC.COM>
you wrote:
>
> I am porting the timeSys Linux to a custom Power PC 860 board.  Our board
> currently runs
> windRiver VxWorks.  I have modified the VxWorks bootrom to allow me to
> download a motorola
> hex record, and I have modified the timeSys bootcode
> arch/ppc/boot/mbx/misc.c:decompress_kernel

This is the generic Linux bootstrap loader, it has nothing to do with
TimeSys.

> loaded at:     00400000 0040C30C
> board data at: 004001C0 004001E4
> relocated to:  0040C0E8 0040C10C
> zimage at:     0040C30C 004BC440
> avail ram:     004BD000 00800000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

This loos strange to me. Didn't you map RAM to 0x0000?

> I was able to use the VisionICE BDM to single step, and see it does jump
to
> the address 0, and
> begin execute the instruction in kernel/arch/ppc/kernel/head_8xx.S:_start

You will not get far  with  the  Vision*;  better  use  a  tool  that
understands the MMU, like the Abatron BDI2000.

> I think the MMU TLB setup I have is not exactly correct, since the vxWorks
> BOOTROM does not
> initialize any MMU registers.  Can someone tell me if I need to initialize
> the M_TWB register for the

MMU should be switched off when starting Linux.

> to be the value for this register?  My physical memory map consists of RAM
> at location 0 to 0x1ffffff

This is not what I see above.

> and my IMMR is set to 0x2b00 0000

And this is plain wrong. The IMMR _must_ be mapped above 0xF0000000.



Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd@denx.de
Use C++ to confuse your enemies; use C to produce stable code.

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

RE: MMU on the power pc 860

[Joe Hamman]

Hi Cecilia,

I'm using visionCLICK 7.9A with the latest visionPROBE DLL.

The visionICE II for the  860 requires firmware version 1.5j or later.  The debugger, visionCLICK, isn't aware of the translations,
so the only requirement is that it is compatible with the firmware.  You'll have to contact Wind River regarding an upgrade.

Regards,
Joe


-----Original Message-----
From: Muaddi, Cecilia [mailto:cecilia.muaddi@alloptic.com]
Sent: Thursday, January 02, 2003 12:11 PM
To: 'Joe Hamman'
Cc: linuxppc-embedded@lists.linuxppc.org
Subject: RE: MMU on the power pc 860

which version of the visionClick you are using?  My vision click is version
7.4A, and the firware version for the visionICE II is vn1.5a. When I enter
the command you have recommended, I got syntax error

>BKM>CF MMU LINUX
!ERROR! - [msg31000] Syntax error in message cf mmu linux
>BKM>cf mmua
!ERROR! - [msg31000] Syntax error in message cf mmua
>BKM>
!ABORT! - [msg72000] User Command Abort
>BKM>

-----Original Message-----
From: Joe Hamman [mailto:joe.hamman@embeddedspecialties.com]
Sent: Sunday, December 22, 2002 8:01 PM
To: Muaddi, Cecilia
Cc: linuxppc-embedded@lists.linuxppc.org
Subject: RE: MMU on the power pc 860

The comment on the Vision* tools' MMU support is incorrect.  The visionICE
II and visionPROBE II support up to four regions of
translation.  You need to enter the details manually:

BKM>CF MMU LINUX
BKM>CF MMUA C0000000 0 FF000000

Use the CF MMUL to list the translation table entries currently defined in
the tool.  You can get the details from WRS.  This will
allow you to use visionCLICK (or SingleStep w/vision) to debug anything
statically linked into the kernel, from address 0 through
init.

Unless you have specific reasons not to switch, I recommend using the U-Boot
bootloader.

-----Original Message-----
From: owner-linuxppc-embedded@lists.linuxppc.org
[mailto:owner-linuxppc-embedded@lists.linuxppc.org]On Behalf Of Wolfgang Denk
Sent: Saturday, December 21, 2002 2:59 PM
To: Muaddi, Cecilia
Cc: 'linuxppc-embedded@lists.linuxppc.org'
Subject: Re: MMU on the power pc 860

in message <885489B3B89FB6449F93E525DF78777F06451E@srvnt506.ALLOPTIC.COM>
you wrote:
>
> I am porting the timeSys Linux to a custom Power PC 860 board.  Our board
> currently runs
> windRiver VxWorks.  I have modified the VxWorks bootrom to allow me to
> download a motorola
> hex record, and I have modified the timeSys bootcode
> arch/ppc/boot/mbx/misc.c:decompress_kernel

This is the generic Linux bootstrap loader, it has nothing to do with
TimeSys.

> loaded at:     00400000 0040C30C
> board data at: 004001C0 004001E4
> relocated to:  0040C0E8 0040C10C
> zimage at:     0040C30C 004BC440
> avail ram:     004BD000 00800000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

This loos strange to me. Didn't you map RAM to 0x0000?

> I was able to use the VisionICE BDM to single step, and see it does jump
to
> the address 0, and
> begin execute the instruction in kernel/arch/ppc/kernel/head_8xx.S:_start

You will not get far  with  the  Vision*;  better  use  a  tool  that
understands the MMU, like the Abatron BDI2000.

> I think the MMU TLB setup I have is not exactly correct, since the vxWorks
> BOOTROM does not
> initialize any MMU registers.  Can someone tell me if I need to initialize
> the M_TWB register for the

MMU should be switched off when starting Linux.

> to be the value for this register?  My physical memory map consists of RAM
> at location 0 to 0x1ffffff

This is not what I see above.

> and my IMMR is set to 0x2b00 0000

And this is plain wrong. The IMMR _must_ be mapped above 0xF0000000.

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

RE: MMU on the power pc 860

[Muaddi, Cecilia]

Hello all,

After changing my IMMR to what the suggested value of 0xf0000000 in both
the bootloader and the linux kernel (zImage), I tried to bootup the
linux again.  But, it seems to failed at the same location.

I see the MMU is NOT enabled when I jump to _start in
kernel/arch/ppc/kernel/head_8xx.S: _start.  I can follow with the
visionICE II until the instruction "rfi" under "turn_on_mmu:" section.

Before the rfi, I checked the M_TMB register, and it is some garbage value.
from the description in the MPC860 PowerQUICC User's Manual, looks like this
should have been the base register for the MMU tablewalk.  Is this register
been set by the bootloader before jumping into the linux kernel?

Also, in the section between _start and turn_on_mmu, the TLB is been setup,
where
are the table entries?  Is it in memory where I can take a peek with the
BDM?

You help is greatly appreciated.

THanks

Cecilia


-----Original Message-----
From: Tom Rini [mailto:trini@kernel.crashing.org]
Sent: Monday, December 23, 2002 9:21 AM
To: Wolfgang Denk
Cc: Muaddi, Cecilia; 'linuxppc-embedded@lists.linuxppc.org'
Subject: Re: MMU on the power pc 860


On Sat, Dec 21, 2002 at 09:59:00PM +0100, Wolfgang Denk wrote:
>
> Dear Cecilia,
>
> in message <885489B3B89FB6449F93E525DF78777F06451E@srvnt506.ALLOPTIC.COM>
you wrote:
> >
> > I am porting the timeSys Linux to a custom Power PC 860 board.  Our
board
> > currently runs
> > windRiver VxWorks.  I have modified the VxWorks bootrom to allow me to
> > download a motorola
> > hex record, and I have modified the timeSys bootcode
> > arch/ppc/boot/mbx/misc.c:decompress_kernel
>
> This is the generic Linux bootstrap loader, it has nothing to do with
> TimeSys.
>
> > loaded at:     00400000 0040C30C
> > board data at: 004001C0 004001E4
> > relocated to:  0040C0E8 0040C10C
> > zimage at:     0040C30C 004BC440
> > avail ram:     004BD000 00800000
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>
> This loos strange to me. Didn't you map RAM to 0x0000?

This is fine.  We assume that end of the wrapper, rounded slightly ->
8mb is 'good' for doing whatever we need.  It's not perfect, but it's
not unexpected anyhow.
[snip]
> > to be the value for this register?  My physical memory map consists of
RAM
> > at location 0 to 0x1ffffff
>
> This is not what I see above.

That's only what the bootloader/wrapper assumes it can use.

> > and my IMMR is set to 0x2b00 0000
>
> And this is plain wrong. The IMMR _must_ be mapped above 0xF0000000.

Indeed.  That could be why things are blowing up, yes?

--
Tom Rini (TR1265)
http://gate.crashing.org/~trini/

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/