64-bit Data Flash Access Problem [MPC8245]

64-bit Data Flash Access Problem [MPC8245]

[Augustine Nebu Philips]

Hi
I have a set of 8 1GB data flash chips (Samsung) on an MPC8245 Ref. Board. These are on a 64-bit bus-mode.

-------DBUS_SIZ[0-1]:DBUS_SIZ[2] = 110b -------

All 8 chips are selected by a single chip select (RCS1). Trying a 32-bit read from the Data Address Location after giving the Command to Access the flash IDs, only 4 flashes on a common byte lane seem to be responding. 32-bit writes appear only on the DH[0-31] and not on DL[0-31].

I am not very clear as to:

(a) How do we perform writes to send out data out on
    all 64-bits of the bus..?
(b) How would we ideally access 64-bit data through 32-    bit reads..?
(c) Or must we *have* 64- bit read/write
    instructions..?

many thanks in advance for any response ..

Regards
Nebu


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RE: 64-bit Data Flash Access Problem [MPC8245]

[Steven Blakeslee]

Are you sure you are not using software floating points?

-----Original Message-----
From: Augustine Nebu Philips [mailto:nebuphilips@eudoramail.com]
Sent: Wednesday, September 24, 2003 1:05 PM
To: linuxppc-embedded@lists.linuxppc.org
Subject: 64-bit Data Flash Access Problem [MPC8245]



Hi
I have a set of 8 1GB data flash chips (Samsung) on an MPC8245 Ref. Board.
These are on a 64-bit bus-mode.

-------DBUS_SIZ[0-1]:DBUS_SIZ[2] = 110b -------

All 8 chips are selected by a single chip select (RCS1). Trying a 32-bit
read from the Data Address Location after giving the Command to Access the
flash IDs, only 4 flashes on a common byte lane seem to be responding.
32-bit writes appear only on the DH[0-31] and not on DL[0-31].

I am not very clear as to:

(a) How do we perform writes to send out data out on
    all 64-bits of the bus..?
(b) How would we ideally access 64-bit data through 32-    bit reads..?
(c) Or must we *have* 64- bit read/write
    instructions..?

many thanks in advance for any response ..

Regards
Nebu


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RE: 64-bit Data Flash Access Problem [MPC8245]

[Augustine Nebu Philips]

Steve,
 I tried to use fp assembly instructions (like lfd). But my assembler has problems and doesnt let me generate my binary. I'm sorry I couldnt properly get you... Should I make use of sw floating points..? That means, should I access 64-bit data only through 64-bit operations..?

Thanks and Regards
Nebu
--------- Original Message ---------

DATE: Wed, 24 Sep 2003 13:31:50
From: Steven Blakeslee <BlakesleeS@embeddedplanet.com>

>Are you sure you are not using software floating points?
>

>Subject: 64-bit Data Flash Access Problem [MPC8245]
>
>
>
>Hi
>I have a set of 8 1GB data flash chips (Samsung) on an MPC8245 Ref. Board.
>These are on a 64-bit bus-mode.
>
>-------DBUS_SIZ[0-1]:DBUS_SIZ[2] = 110b -------
>
>All 8 chips are selected by a single chip select (RCS1). Trying a 32-bit
>read from the Data Address Location after giving the Command to Access the
>flash IDs, only 4 flashes on a common byte lane seem to be responding.
>32-bit writes appear only on the DH[0-31] and not on DL[0-31].
>
>I am not very clear as to:
>
>(a) How do we perform writes to send out data out on
>    all 64-bits of the bus..?
>(b) How would we ideally access 64-bit data through 32-    bit reads..?
>(c) Or must we *have* 64- bit read/write
>    instructions..?
>
>many thanks in advance for any response ..
>
>Regards
>Nebu
>
>
>Need a new email address that people can remember
>Check out the new EudoraMail at
>http://www.eudoramail.com
>
>



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Check out the new EudoraMail at
http://www.eudoramail.com

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Re: 64-bit Data Flash Access Problem [MPC8245]

[Jerry Van Baren]

32 bit reads should be easy: reading 32 bits should cause a 64 (full width)
read since you only have one chip select and the processor will ignore the
32 bits it doesn't want.  I'm confused when you say you have only one chip
select but then say only 4 chips respond when you do a 32 bit read.  How do
the other 4 chips know _not_ to respond?

Writing is much more complicated.  If you have what you say you have, 64
bit wide flash with no provisions for selecting upper/lower, you will need
to do 64 bit write operations.  This requires a "trick": using a floating
point store operation, which is a 64 bit write.  As an alternative, you can
enable cache, do your write, and then flush the cache (also a 64 bit
write), but that is much more complex because you have the cache as an
intermediary between you and your flash and it will do things you didn't
expect it to do :-(.

gvb

At 12:04 PM 9/24/2003 -0400, nebuphilips@eudoramail.com wrote:
>
>I have a set of 8 1GB data flash chips (Samsung) on an MPC8245 Ref.
>Board. These are on a 64-bit bus-mode.
>
>-------DBUS_SIZ[0-1]:DBUS_SIZ[2] = 110b -------
>
>All 8 chips are selected by a single chip select (RCS1). Trying a
>32-bit read from the Data Address Location after giving the Command
>to Access the flash IDs, only 4 flashes on a common byte lane seem to
>be responding. 32-bit writes appear only on the DH[0-31] and not on
>DL[0-31].
>
>I am not very clear as to:
>
>(a) How do we perform writes to send out data out on
>     all 64-bits of the bus..?
>(b) How would we ideally access 64-bit data through 32-bit reads..?
>(c) Or must we *have* 64- bit read/write
>     instructions..?

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RE: 64-bit Data Flash Access Problem [MPC8245]

[Steven Blakeslee]

It sounded like the problem you were describing is caused by software
floating points.  If the bus size is 64bit then you must write 64bit.
Software floating points cheat this by doing two consecutive 32bit writes,
the 8245 will not allow this.

-----Original Message-----
From: Augustine Nebu Philips [mailto:nebuphilips@eudoramail.com]
Sent: Wednesday, September 24, 2003 1:35 PM
To: linuxppc-embedded@lists.linuxppc.org
Subject: RE: 64-bit Data Flash Access Problem [MPC8245]



Steve,
 I tried to use fp assembly instructions (like lfd). But my assembler has
problems and doesnt let me generate my binary. I'm sorry I couldnt properly
get you... Should I make use of sw floating points..? That means, should I
access 64-bit data only through 64-bit operations..?

Thanks and Regards
Nebu
--------- Original Message ---------

DATE: Wed, 24 Sep 2003 13:31:50
From: Steven Blakeslee <BlakesleeS@embeddedplanet.com>

>Are you sure you are not using software floating points?
>

>Subject: 64-bit Data Flash Access Problem [MPC8245]
>
>
>
>Hi
>I have a set of 8 1GB data flash chips (Samsung) on an MPC8245 Ref. Board.
>These are on a 64-bit bus-mode.
>
>-------DBUS_SIZ[0-1]:DBUS_SIZ[2] = 110b -------
>
>All 8 chips are selected by a single chip select (RCS1). Trying a 32-bit
>read from the Data Address Location after giving the Command to Access the
>flash IDs, only 4 flashes on a common byte lane seem to be responding.
>32-bit writes appear only on the DH[0-31] and not on DL[0-31].
>
>I am not very clear as to:
>
>(a) How do we perform writes to send out data out on
>    all 64-bits of the bus..?
>(b) How would we ideally access 64-bit data through 32-    bit reads..?
>(c) Or must we *have* 64- bit read/write
>    instructions..?
>
>many thanks in advance for any response ..
>
>Regards
>Nebu
>
>
>Need a new email address that people can remember
>Check out the new EudoraMail at
>http://www.eudoramail.com
>
>



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RE: 64-bit Data Flash Access Problem [MPC8245]

[Milliorn Gary-rxcr80]

> -----Original Message-----
> From: Augustine Nebu Philips [mailto:nebuphilips@eudoramail.com]
>...
> I have a set of 8 1GB data flash chips (Samsung) on an MPC8245 Ref.
> Board. These are on a 64-bit bus-mode.
>
> -------DBUS_SIZ[0-1]:DBUS_SIZ[2] = 110b -------
>
> All 8 chips are selected by a single chip select (RCS1). Trying a
> 32-bit read from the Data Address Location after giving the Command
> to Access the flash IDs, only 4 flashes on a common byte lane seem to
> be responding. 32-bit writes appear only on the DH[0-31] and not on
> DL[0-31].

  Is this under Linux, or something else?

> I am not very clear as to:
>
> (a) How do we perform writes to send out data out on all 64-bits of
> the bus..?

   stfd is the only way to do that.  You'll need floating
   point enabled on the code generation.  stfd works regardless
   of general FP emulation support, but if code is interrupted
   and the FPRs are not restored, it breaks.

> (b) How would we ideally access 64-bit data through 32-bit reads..?

  For reads?  Any way you want.  The 8245 will gather the
  data for you.  You could load 64 bits with lfd, but
  transferring data from the FPRs to the GPRS would lose
  any advantage over just doing two 32-bit reads.

> (c) Or must we *have* 64- bit read/write instructions..?

  Since there is a common WE* line, you must write all
  the flash commands at the same time.  Attempting to
  write two 32-bit command sets (i.e UNLOCK to flashaddr[0]
  and flashaddr[4]) would result in a second write of the CFI
  pattern, resetting it.

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Re: 64-bit Data Flash Access Problem [MPC8245]

[Dan Malek]

Augustine Nebu Philips wrote:

> I am not very clear as to:
>
> (a) How do we perform writes to send out data out on
>     all 64-bits of the bus..?
> (b) How would we ideally access 64-bit data through 32-    bit reads..?
> (c) Or must we *have* 64- bit read/write
>     instructions..?

This has been discussed before and you can probably find more details
in the mailing list archives.  There are two approaches.  One is to use
floating point registers, another is to use cache line operations.  Floating
point isn't enabled in the kernel, so you will have to make some modifications
to context switching if you choose that mode (not my recommendation).  You
can use the cache line instructions to zero/load/store cache lines that
represent I/O to the flash parts.  The best solution is to not use 64-bit
wide flash arrays....

If you write a user space application and mmap() the flash, which is a
common method, either solution is available to you.


good luck.


	-- Dan


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