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From: Trent Piepho <xyzzy@speakeasy.org>
To: Laurent Pinchart <laurentp@cse-semaphore.com>
Cc: linuxppc-dev@ozlabs.org,
	MTD mailing list <linux-mtd@lists.infradead.org>
Subject: Re: [PATCHv2] powerpc: Describe memory-mapped RAM&ROM chips OF bindings
Date: Tue, 1 Apr 2008 02:18:44 -0700 (PDT)	[thread overview]
Message-ID: <Pine.LNX.4.64.0804010217470.3571@t2.domain.actdsltmp> (raw)
In-Reply-To: <200804011047.42971.laurentp@cse-semaphore.com>

On Tue, 1 Apr 2008, Laurent Pinchart wrote:
> On Monday 31 March 2008 19:06, Sergei Shtylyov wrote:
>>>        p) Freescale Synchronous Serial Interface
>>> -	  q) USB EHCI controllers
>>> +      q) USB EHCI controllers
>>> +      r) Memory-mapped RAM & ROM
>>
>>     Memory-mapped RA/RO Memory again? Should better drop this. :-)
>
> You're quite picky, aren't you ? :-)
>
> I suppose "Memory-mapped RA & RO" won't be accepted, so what about "Auxiliary
> RAM & ROM" ?

Direct-mapped?

  reply	other threads:[~2008-04-01  9:25 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-03-31 16:39 [PATCHv2] powerpc: Describe memory-mapped RAM&ROM chips OF bindings Laurent Pinchart
2008-03-31 17:06 ` Sergei Shtylyov
2008-04-01  8:47   ` Laurent Pinchart
2008-04-01  9:18     ` Trent Piepho [this message]
2008-04-01 12:39       ` Laurent Pinchart
2008-04-01 13:04         ` Sergei Shtylyov
2008-04-01 13:16 ` Grant Likely
2008-04-03 10:15   ` Laurent Pinchart

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