From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E5F93DE1A4 for ; Tue, 22 Apr 2008 06:01:44 +1000 (EST) Date: Mon, 21 Apr 2008 14:57:47 -0500 (CDT) From: Kumar Gala To: linuxppc-dev@ozlabs.org Subject: [PATCH] [POWERPC] ppc32: Fix errata for 603 CPUs Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Cc: Paul Mackerras List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , 603 CPUs have the same issue that some 750 CPUs have in that they can crash in funny ways if a store from an FPU register instruction is executed on a register that has never been initialized since power on. This patch fixes it by making sure all FP registers have been properly initialized at kernel boot. Signed-off-by: Kumar Gala --- Paul, I've put this into my powerpc-next tree since its a pretty trivial patch. - k arch/powerpc/kernel/cpu_setup_6xx.S | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S index f1ee0b3..4a1c3cd 100644 --- a/arch/powerpc/kernel/cpu_setup_6xx.S +++ b/arch/powerpc/kernel/cpu_setup_6xx.S @@ -17,7 +17,14 @@ #include _GLOBAL(__setup_cpu_603) - b setup_common_caches + mflr r4 +BEGIN_FTR_SECTION + bl __init_fpu_registers +END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) + bl __init_fpu_registers + bl setup_common_caches + mtlr r4 + blr _GLOBAL(__setup_cpu_604) mflr r4 bl setup_common_caches -- 1.5.4.1