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From: Kumar Gala <galak@kernel.crashing.org>
To: linuxppc-dev@ozlabs.org
Subject: [PATCH 1/3] powerpc: Fix pte_update for CONFIG_PTE_64BIT and !PTE_ATOMIC_UPDATES
Date: Mon, 14 Jul 2008 08:08:45 -0500 (CDT)	[thread overview]
Message-ID: <Pine.LNX.4.64.0807140808090.9284@blarg.am.freescale.net> (raw)

Because the pte is now 64-bits the compiler was optimizing the update
to always clear the upper 32-bits of the pte.  We need to ensure the
clr mask is treated as an unsigned long long to get the proper behavior.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
---
 include/asm-powerpc/pgtable-ppc32.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h
index 11eede4..73015f0 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -624,7 +624,7 @@ static inline unsigned long long pte_update(pte_t *p,
 	: "cc" );
 #else /* PTE_ATOMIC_UPDATES */
 	unsigned long long old = pte_val(*p);
-	*p = __pte((old & ~clr) | set);
+	*p = __pte((old & ~(unsigned long long)clr) | set);
 #endif /* !PTE_ATOMIC_UPDATES */

 #ifdef CONFIG_44x
-- 
1.5.5.1

             reply	other threads:[~2008-07-14 13:08 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-07-14 13:08 Kumar Gala [this message]
2008-07-14 13:09 ` [PATCH 2/3] powerpc: rework FSL Book-E PTE access and TLB miss Kumar Gala
2008-07-14 13:11   ` [PATCH 3/3] powerpc/fsl: Minor TLBSYNC cleanup for FSL Book-E Kumar Gala
2008-07-15  5:43 ` [PATCH 1/3] powerpc: Fix pte_update for CONFIG_PTE_64BIT and !PTE_ATOMIC_UPDATES Benjamin Herrenschmidt

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