From: Trent Piepho <tpiepho@freescale.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH] powerpc: Fix bogus cache flushing on all 40x and BookE processors
Date: Wed, 3 Dec 2008 15:09:22 -0800 (PST) [thread overview]
Message-ID: <Pine.LNX.4.64.0812031451450.7648@t2.domain.actdsltmp> (raw)
In-Reply-To: <1228209641.7356.176.camel@pasglop>
On Tue, 2 Dec 2008, Benjamin Herrenschmidt wrote:
> On Tue, 2008-12-02 at 01:36 -0600, Kumar Gala wrote:
>
>>> #define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
>>> CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
>>> - CPU_FTR_UNIFIED_ID_CACHE)
>>> + CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE)
>>> #define CPU_FTRS_E500 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
>>> - CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN)
>>> + CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP |
>>> CPU_FTR_NODSISRALIGN \
>>
>> Added a '|' at the end of the line before the escape
>
> Right. Will send a new patch tomorrow. Appart from that, have you
> verified it doesn't have any adverse effects for you ? I did some quick
> tests on 440 and things seem to be fine.
#ifdef __powerpc64__
#define LONG_ASM_CONST(x) ASM_CONST(x)
#else
#define LONG_ASM_CONST(x) 0
#endif
#define CPU_FTR_NOEXECUTE LONG_ASM_CONST(0x0000000800000000)
Am I not looking at the right code? Since e200 and e500 aren't powerpc64,
doesn't adding CPU_FTR_NOEXECUTE have no effect at all?
next prev parent reply other threads:[~2008-12-03 23:11 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-12-01 6:01 [PATCH] powerpc: Fix bogus cache flushing on all 40x and BookE processors Benjamin Herrenschmidt
2008-12-02 7:36 ` Kumar Gala
2008-12-02 9:20 ` Benjamin Herrenschmidt
2008-12-03 23:09 ` Trent Piepho [this message]
2008-12-04 0:06 ` Benjamin Herrenschmidt
2008-12-02 15:41 ` Steven A. Falco
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