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Sun, 06 Dec 2020 12:16:54 -0800 (PST) Date: Sun, 6 Dec 2020 21:16:36 +0100 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Bjorn Helgaas Subject: Re: [PATCH v6 1/5] PCI: Unify ECAM constants in native PCI Express drivers Message-ID: References: <20201129230743.3006978-1-kw@linux.com> <20201129230743.3006978-2-kw@linux.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20201129230743.3006978-2-kw@linux.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Heiko Stuebner , Shawn Lin , Paul Mackerras , Thomas Petazzoni , Jonathan Chocron , Toan Le , Will Deacon , Rob Herring , Lorenzo Pieralisi , Michal Simek , linux-rockchip@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, Jonathan Derrick , linux-pci@vger.kernel.org, Ray Jui , Florian Fainelli , linux-rpi-kernel@lists.infradead.org, Jonathan Cameron , linux-arm-kernel@lists.infradead.org, Scott Branden , Zhou Wang , Robert Richter , linuxppc-dev@lists.ozlabs.org, Nicolas Saenz Julienne Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Hello Nicolas, Florian and Florian, [...] > -/* Configuration space read/write support */ > -static inline int brcm_pcie_cfg_index(int busnr, int devfn, int reg) > -{ > - return ((PCI_SLOT(devfn) & 0x1f) << PCIE_EXT_SLOT_SHIFT) > - | ((PCI_FUNC(devfn) & 0x07) << PCIE_EXT_FUNC_SHIFT) > - | (busnr << PCIE_EXT_BUSNUM_SHIFT) > - | (reg & ~3); > -} > - > static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, > int where) > { > @@ -716,7 +704,7 @@ static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, > return PCI_SLOT(devfn) ? NULL : base + where; > > /* For devices, write to the config space index register */ > - idx = brcm_pcie_cfg_index(bus->number, devfn, 0); > + idx = PCIE_ECAM_OFFSET(bus->number, devfn, 0); > writel(idx, pcie->base + PCIE_EXT_CFG_INDEX); > return base + PCIE_EXT_CFG_DATA + where; > } [...] Passing the hard-coded 0 as the "reg" argument here never actually did anything, thus the 32 bit alignment was never correctly enforced. My question would be: should this be 32 bit aligned? It seems like the intention was to perhaps make the alignment? I am sadly not intimately familiar with his hardware, so I am not sure if there is something to fix here or not. Also, I wonder whether it would be safe to pass the offset (the "where" variable) rather than hard-coded 0? Thank you for help in advance! Bjorn also asked the same question: https://lore.kernel.org/linux-pci/20201120203428.GA272511@bjorn-Precision-5520/ Krzysztof