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From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Cc: maddy@linux.vnet.ibm.com, rnsastry@linux.ibm.com,
	linux-perf-users@vger.kernel.org, jolsa@kernel.org,
	kjain@linux.ibm.com, linuxppc-dev@lists.ozlabs.org
Subject: Re: [V4 0/2] tools/perf: Add instruction and data address registers to extended regs in powerpc
Date: Tue, 19 Oct 2021 13:30:05 -0300	[thread overview]
Message-ID: <YW7yjZE8LKvgjapw@kernel.org> (raw)
In-Reply-To: <20211018114948.16830-1-atrajeev@linux.vnet.ibm.com>

Em Mon, Oct 18, 2021 at 05:19:46PM +0530, Athira Rajeev escreveu:
> Patch set adds PMU registers namely Sampled Instruction Address Register
> (SIAR) and Sampled Data Address Register (SDAR) as part of extended regs
> in PowerPC. These registers provides the instruction/data address and
> adding these to extended regs helps in debug purposes.
> 
> Patch 1/2 refactors the existing macro definition of
> PERF_REG_PMU_MASK_300 and PERF_REG_PMU_MASK_31 to make it more
> readable.
> Patch 2/2 includes perf tools side changes to add the SPRs to
> sample_reg_mask to use with -I? option.

Thanks, applied.

- Arnaldo

 
> Changelog:
> Change from v3 -> v4:
> - Spilt tools side patches separately since kernel side
>   changes are in powerpc/next. There is no code wise changes
>   from v3.
>   Link to previous version:
>   https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=265811&state=*
> 
>   Kernel patches are taken to powerpc/next:
>   [1/4] powerpc/perf: Refactor the code definition of perf reg extended mask
>   https://git.kernel.org/powerpc/c/02b182e67482d9167a13a0ff19b55037b70b21ad
>   [3/4] powerpc/perf: Expose instruction and data address registers as part of extended regs
>   https://git.kernel.org/powerpc/c/29908bbf7b8960d261dfdd428bbaa656275e80f3
> 
> Change from v2 -> v3:
> Addressed review comments from Michael Ellerman
> - Fixed the macro definition to use "unsigned long long"
>   which otherwise will cause build error with perf on
>   32-bit.
> - Added Reviewed-by from Daniel Axtens for patch3.
> 
> Change from v1 -> v2:
> Addressed review comments from Michael Ellerman
> - Refactored the perf reg extended mask value macros for
>   PERF_REG_PMU_MASK_300 and PERF_REG_PMU_MASK_31 to
>   make it more readable. Also moved PERF_REG_EXTENDED_MAX
>   along with enum definition similar to PERF_REG_POWERPC_MAX.
> 
> Athira Rajeev (2):
>   tools/perf: Refactor the code definition of perf reg extended mask in
>     tools side header file
>   tools/perf: Add perf tools support to expose instruction and data
>     address registers as part of extended regs
> 
>  .../arch/powerpc/include/uapi/asm/perf_regs.h | 28 ++++++++++++-------
>  tools/perf/arch/powerpc/include/perf_regs.h   |  2 ++
>  tools/perf/arch/powerpc/util/perf_regs.c      |  2 ++
>  3 files changed, 22 insertions(+), 10 deletions(-)
> 
> -- 
> 2.33.0

-- 

- Arnaldo

  parent reply	other threads:[~2021-10-19 16:30 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-18 11:49 [V4 0/2] tools/perf: Add instruction and data address registers to extended regs in powerpc Athira Rajeev
2021-10-18 11:49 ` [V4 1/2] tools/perf: Refactor the code definition of perf reg extended mask in tools side header file Athira Rajeev
2021-10-18 11:49 ` [V4 2/2] tools/perf: Add perf tools support to expose instruction and data address registers as part of extended regs Athira Rajeev
2021-10-19 16:30 ` Arnaldo Carvalho de Melo [this message]
2021-10-21  2:52   ` [V4 0/2] tools/perf: Add instruction and data address registers to extended regs in powerpc Athira Rajeev

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