From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8251EC433EF for ; Fri, 18 Mar 2022 11:33:47 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4KKhjQ09BYz3bWl for ; Fri, 18 Mar 2022 22:33:46 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=145.40.68.75; helo=ams.source.kernel.org; envelope-from=cmarinas@kernel.org; receiver=) Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4KKhhs2bNbz3069 for ; Fri, 18 Mar 2022 22:33:17 +1100 (AEDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 6049EB8219E; Fri, 18 Mar 2022 11:33:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 81840C340E8; Fri, 18 Mar 2022 11:33:04 +0000 (UTC) Date: Fri, 18 Mar 2022 11:33:00 +0000 From: Catalin Marinas To: David Hildenbrand Subject: Re: [PATCH v1 4/7] arm64/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE Message-ID: References: <20220315141837.137118-1-david@redhat.com> <20220315141837.137118-5-david@redhat.com> <8989a07b-3a5b-0c81-983f-b35403d19579@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8989a07b-3a5b-0c81-983f-b35403d19579@redhat.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: x86@kernel.org, Jan Kara , Yang Shi , Dave Hansen , Peter Xu , Michal Hocko , linux-mm@kvack.org, Donald Dutile , Liang Zhang , Borislav Petkov , Alexander Gordeev , Will Deacon , Christoph Hellwig , Paul Mackerras , Andrea Arcangeli , linux-s390@vger.kernel.org, Vasily Gorbik , Rik van Riel , Hugh Dickins , Matthew Wilcox , Mike Rapoport , Ingo Molnar , linux-arm-kernel@lists.infradead.org, Jason Gunthorpe , David Rientjes , Pedro Gomes , Jann Horn , John Hubbard , Heiko Carstens , Shakeel Butt , Oleg Nesterov , Thomas Gleixner , Vlastimil Babka , Oded Gabbay , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Nadav Amit , Andrew Morton , Linus Torvalds , Roman Gushchin , "Kirill A . Shutemov" , Mike Kravetz Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, Mar 18, 2022 at 10:59:10AM +0100, David Hildenbrand wrote: > diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h > index b1e1b74d993c..fd6ddf14c190 100644 > --- a/arch/arm64/include/asm/pgtable-prot.h > +++ b/arch/arm64/include/asm/pgtable-prot.h > @@ -14,6 +14,7 @@ > * Software defined PTE bits definition. > */ > #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */ > +#define PTE_SWP_EXCLUSIVE (PTE_TABLE_BIT) /* only for swp ptes */ > #define PTE_DIRTY (_AT(pteval_t, 1) << 55) > #define PTE_SPECIAL (_AT(pteval_t, 1) << 56) > #define PTE_DEVMAP (_AT(pteval_t, 1) << 57) > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index 94e147e5456c..c78994073cd0 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -402,6 +402,22 @@ static inline pgprot_t mk_pmd_sect_prot(pgprot_t prot) > return __pgprot((pgprot_val(prot) & ~PMD_TABLE_BIT) | PMD_TYPE_SECT); > } > > +#define __HAVE_ARCH_PTE_SWP_EXCLUSIVE > +static inline pte_t pte_swp_mkexclusive(pte_t pte) > +{ > + return set_pte_bit(pte, __pgprot(PTE_SWP_EXCLUSIVE)); > +} > + > +static inline int pte_swp_exclusive(pte_t pte) > +{ > + return pte_val(pte) & PTE_SWP_EXCLUSIVE; > +} > + > +static inline pte_t pte_swp_clear_exclusive(pte_t pte) > +{ > + return clear_pte_bit(pte, __pgprot(PTE_SWP_EXCLUSIVE)); > +} > + > #ifdef CONFIG_NUMA_BALANCING > /* > * See the comment in include/linux/pgtable.h > @@ -908,7 +924,8 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma, > > /* > * Encode and decode a swap entry: > - * bits 0-1: present (must be zero) > + * bits 0: present (must be zero) > + * bits 1: remember PG_anon_exclusive It looks fine to me. Reviewed-by: Catalin Marinas