From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F14DC43334 for ; Fri, 15 Jul 2022 02:28:28 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LkZzH0vzXz3c4t for ; Fri, 15 Jul 2022 12:28:27 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=IEJMJOhz; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::42b; helo=mail-pf1-x42b.google.com; envelope-from=shorne@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=IEJMJOhz; dkim-atps=neutral Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4LkZyX1cWSz3bsD for ; Fri, 15 Jul 2022 12:27:46 +1000 (AEST) Received: by mail-pf1-x42b.google.com with SMTP id v7so3529275pfb.0 for ; Thu, 14 Jul 2022 19:27:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=2PHQEHiPUK5/kMXd0Tiaa/2KkMXqEO7YBVcbpRdWkzU=; b=IEJMJOhzDLt+yfASXyPdeXR1oGGTsGDx3vl/pKDJYU0fM7xGoEYifRYmndgoDBn8V+ 8KaH2UOTKaWNm2bcmSVrDZgCQRS5bZdc/JErVv0oiKI4D779tqf8qqqo8Y4iLSedLKu6 KJvBrd7MyyR0lBJJ++sR+EsLWE8c5/Kb5Z0fTJPJtZS1NwarGIQrRHk8mNKtsfmdVnsk DdHkjkVUI3Go5QJOuWJ7tFYeVZyOTWJ1DVFRKCXBlPEbNV+fVinpn4yVP5n1HJQodgh9 gnwtaOMTLLw/5pbt9rN0/tXbYqausx/cGWYNWZ3PmgEiWfJZrxEj2bcNKssaqRx0mKTs 9LaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=2PHQEHiPUK5/kMXd0Tiaa/2KkMXqEO7YBVcbpRdWkzU=; b=ju1iIypGX14Xaugy4TEYlJD3q+u3vf/Rw5tjgH6BTfcd3Jjhq0u0isg1Bjr0tB4Rew ub+9dYL559uav8gbzOE+ThUBsbRj/pw+cVwfz3OXyELLo8htiIapr2VaVrNoY+/k0Vuq O6STH9ltJ+PFINcq78tYX14ZkPun/X1ACNwubg1fMLcyLntk6oDKgT0/qo6+NoMX3SVw pYgoZq4ZOe1VR7VMgBffgA131IhZXkX7aiFtCXuNsTGJbuVs6t4L89CkNPEbq4C6VfT1 mBkg0SbQw/TCo1Lm+D7pQ/C/8bGSBaLUSRhoZw3p0htBrr1WF08pZzkN1IUMhySbGQzu 4kKg== X-Gm-Message-State: AJIora+VyVmzKutZJjVT6Eb+08o00fnOiOb80B/ry4pfqVF9Un/H0dau cLAzApRxyr0JbdfdXGZQFew= X-Google-Smtp-Source: AGRyM1tFpAPO14ibbARmvlyA7Dm2i3y8ihIra24Y5oG5D9v2V9oCrT80IZwFQQ8AdtfnaIGZOBL3gA== X-Received: by 2002:a63:9547:0:b0:408:be53:b599 with SMTP id t7-20020a639547000000b00408be53b599mr10179125pgn.463.1657852063244; Thu, 14 Jul 2022 19:27:43 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id v22-20020a631516000000b0040caab35e5bsm1998257pgl.89.2022.07.14.19.27.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Jul 2022 19:27:42 -0700 (PDT) Date: Fri, 15 Jul 2022 11:27:41 +0900 From: Stafford Horne To: Max Filippov Subject: Re: [RFC PATCH 1/2] asm-generic: Remove pci.h copying code out to architectures Message-ID: References: <20220714214657.2402250-1-shorne@gmail.com> <20220714214657.2402250-2-shorne@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:IA64 \(Itanium\) PL..." , Matthew Rosato , Dave Hansen , "Gustavo A. R. Silva" , Paul Mackerras , "H. Peter Anvin" , "open list:SPARC + UltraSPAR..." , Alexander Gordeev , linux-riscv , Linux-Arch , linux-s390 , Arnd Bergmann , "maintainer:X86 ARCHITECTURE..." , Ingo Molnar , Geert Uytterhoeven , linux-pci@vger.kernel.org, Matt Turner , Christian Borntraeger , "open list:TENSILICA XTENSA PORT \(xtensa\)" , Albert Ou , Kees Cook , Vasily Gorbik , Niklas Schnelle , Heiko Carstens , "open list:M68K ARCHITECTURE" , Borislav Petkov , Paul Walmsley , Bjorn Helgaas , Thomas Gleixner , Richard Henderson , Chris Zankel , Pierre Morel , Nick Child , LKML , Palmer Dabbelt , Sven Schnelle , "open list:ALPHA PORT" , Ivan Kokshaysky , linuxppc-dev@lists.ozlabs.org, "David S. Miller" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Jul 14, 2022 at 06:45:27PM -0700, Max Filippov wrote: > On Thu, Jul 14, 2022 at 2:47 PM Stafford Horne wrote: > > > > The generic pci.h header provides a definition of pci_get_legacy_ide_irq > > which is used by architectures that use PC-style interrupt numbers. > > > > This patch removes the old pci.h in order to make room for a new > > pci.h to be used by arm64, riscv, openrisc, etc. > > > > The existing code in pci.h is moved out to architectures. > > > > Suggested-by: Arnd Bergmann > > Link: https://lore.kernel.org/lkml/CAK8P3a0JmPeczfmMBE__vn=Jbvf=nkbpVaZCycyv40pZNCJJXQ@mail.gmail.com/ > > Signed-off-by: Stafford Horne > > --- > > arch/alpha/include/asm/pci.h | 1 - > > arch/ia64/include/asm/pci.h | 1 - > > arch/m68k/include/asm/pci.h | 7 +++++-- > > arch/powerpc/include/asm/pci.h | 1 - > > arch/s390/include/asm/pci.h | 6 +++++- > > arch/sparc/include/asm/pci.h | 5 ++++- > > arch/x86/include/asm/pci.h | 6 ++++-- > > arch/xtensa/include/asm/pci.h | 6 ++++-- > > include/asm-generic/pci.h | 17 ----------------- > > 9 files changed, 22 insertions(+), 28 deletions(-) > > delete mode 100644 include/asm-generic/pci.h > > [...] > > > diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h > > index 8e2b48a268db..f57ede61f5db 100644 > > --- a/arch/xtensa/include/asm/pci.h > > +++ b/arch/xtensa/include/asm/pci.h > > @@ -43,7 +43,9 @@ > > #define ARCH_GENERIC_PCI_MMAP_RESOURCE 1 > > #define arch_can_pci_mmap_io() 1 > > > > -/* Generic PCI */ > > -#include > > Ok. > > > +static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) > > +{ > > + return channel ? 15 : 14; > > +} > > This addition does not make sense for the xtensa as it isn't even possible > to enable PNP support (the only user of this function) on xtensa. Thanks for your feedback, this is the kind of feedback I was hoping to fish out with this patch. I will look into completely removing this then. -Stafford