From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 046BCC28B2F for ; Tue, 11 Mar 2025 14:42:53 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4ZBxLz3QbYz3br2; Wed, 12 Mar 2025 01:42:51 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1741704171; cv=none; b=D4pv2I5IDEf/tYy+JWzLS6Y0jcqsjimwGoVpyRgrHnD170d7H3UEt5+cdG3e/6xD04yO+oF2BGUIFFXvr/AAmLkneqNEk6hak6s93krOBNU9E63UeLhX0taLZUqoTrt1avTjOe34pdCV45cvnPZa845VoOr5t+dv5pqyhX5ONm+BFxGwOipw5Hr1Y/TBf4HyLYQBjFmzLa2WDO2trHIk1XEAUJAHRvjApvIibEtAXpVMerxa6fP8zXcoCkZs/UsRgpbmpNcgEY3vzO0KpF3fZW8I/rGgIIQCF3paVNWCzkGG1mVaKGhQ9QlzOSrgrjfppp8ldY0+1JXiUurXtUJaZw== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1741704171; c=relaxed/relaxed; bh=fJDitTbMt8bSQYfsy1WuADDhZk9jW/Xx794Vs5HU0Ew=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=L75LsaCQCa5h3eebc0HHxUoqdKYAlb1Ai/iAKEMvekzmcHdQkPGaVbqCMhzYGHp0ht2SjD1MibQPLFb9g0e9hzOvdRZjjkCnV3pBMOohWNgqheR4c/Q92PAOi5U1U7arie1pQOLlc7Ac+HurUYnMw+upkmI6E3a9vQ6bj4UA73os6EMm7QSjyjMKAXD2D8pqFFIiSz4dOaeOt96lOIqY4c5aBs+noyBaY6Rftif0+tAxM2X1/pV7Rn91BHpv3jf7gsWtEa1d/KxYaIDyji/Y+kXtfWFSYnN4BxDHQmlDmPoAlOSPBMDVXhyZ4NCFH454y9jzTYZUk4L7Bu5b++GNdw== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=fail (p=none dis=none) header.from=arm.com; spf=none (client-ip=217.140.110.172; helo=foss.arm.com; envelope-from=sudeep.holla@foss.arm.com; receiver=lists.ozlabs.org) smtp.mailfrom=foss.arm.com Authentication-Results: lists.ozlabs.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=foss.arm.com (client-ip=217.140.110.172; helo=foss.arm.com; envelope-from=sudeep.holla@foss.arm.com; receiver=lists.ozlabs.org) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lists.ozlabs.org (Postfix) with ESMTP id 4ZBxLy67JVz3blV for ; Wed, 12 Mar 2025 01:42:50 +1100 (AEDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 189092720; Tue, 11 Mar 2025 07:42:31 -0700 (PDT) Received: from bogus (e133711.arm.com [10.1.196.55]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E34F53F694; Tue, 11 Mar 2025 07:42:15 -0700 (PDT) Date: Tue, 11 Mar 2025 14:42:13 +0000 From: Sudeep Holla To: Yicong Yang Cc: , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v12 2/4] arch_topology: Support SMT control for OF based system Message-ID: References: <20250311075143.61078-1-yangyicong@huawei.com> <20250311075143.61078-3-yangyicong@huawei.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250311075143.61078-3-yangyicong@huawei.com> On Tue, Mar 11, 2025 at 03:51:41PM +0800, Yicong Yang wrote: > From: Yicong Yang > > On building the topology from the devicetree, we've already gotten the > SMT thread number of each core. Update the largest SMT thread number > and enable the SMT control by the end of topology parsing. > > The framework's SMT control provides two interface to the users [1] > through /sys/devices/system/cpu/smt/control: > 1) enable SMT by writing "on" and disable by "off" > 2) enable SMT by writing max_thread_number or disable by writing 1 > > Both method support to completely disable/enable the SMT cores so both > work correctly for symmetric SMT platform and asymmetric platform with > non-SMT and one type SMT cores like: > core A: 1 thread > core B: X (X!=1) threads > > Note that for a theoretically possible multiple SMT-X (X>1) core > platform the SMT control is also supported as expected but only > by writing the "on/off" method. > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/ABI/testing/sysfs-devices-system-cpu#n542 Just the path must suffice here, no need for URL. LGTM otherwise, much simple now: Reviewed-by: Sudeep Holla -- Regards, Sudeep