From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 80FC1C7EE22 for ; Tue, 9 May 2023 13:01:25 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4QFyw33tVMz3fPT for ; Tue, 9 May 2023 23:01:23 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=qHeYapAL; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=2604:1380:4641:c500::1; helo=dfw.source.kernel.org; envelope-from=vkoul@kernel.org; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=qHeYapAL; dkim-atps=neutral Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4QFytx4L1xz3fK0 for ; Tue, 9 May 2023 23:00:25 +1000 (AEST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B525064696; Tue, 9 May 2023 13:00:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 50A1FC433EF; Tue, 9 May 2023 13:00:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1683637220; bh=/gNuNjyjzD94LeQPPBnUSbLHlkRpw/7XLI3M8KSY0B8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=qHeYapALQh/WPbieIv0prg07vJ/QNowDSaROx28vil1Kr/9Fl2ayv8WSHG63XePea GaKQ03lvXRMUya1mEwnOmBWwwXG2WbtgIKm6f7YWQTlp4SIrFQTwc3e7WNvb5b1Oak 9cE80UU45ZYo3SKZp1iqT4ThmLAE7UCZhX7Bm8EGRyzR/Zu4kJutfAh1oJxsYoc3uF mkJD+NcGKbFucI/QNOHZG3rRXH/IMMYFNkKCgqA15Zz6IGOOfS43lezGIPTppWZTOt ZRAOMvwGv+QqT6zFoUGpo5q1N0C1rc2WLmIemAi1QeHbvdja9seddcfXaEg/6MqR8G 0YL8mjCYiM/OQ== Date: Tue, 9 May 2023 18:30:16 +0530 From: Vinod Koul To: Sean Anderson Subject: Re: [PATCH v14 06/15] clk: Add Lynx 10G SerDes PLL driver Message-ID: References: <20230413160607.4128315-1-sean.anderson@seco.com> <20230413160607.4128315-7-sean.anderson@seco.com> <1012f955-180e-0013-cc13-1da10991b5f5@seco.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1012f955-180e-0013-cc13-1da10991b5f5@seco.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kishon Vijay Abraham I , devicetree@vger.kernel.org, Krzysztof Kozlowski , Madalin Bucur , Stephen Boyd , Michael Turquette , Rob Herring , Camelia Alexandra Groza , Bagas Sanjaya , Ioana Ciornei , linux-phy@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 08-05-23, 11:31, Sean Anderson wrote: > On 5/8/23 05:15, Vinod Koul wrote: > >> +int lynx_clks_init(struct device *dev, struct regmap *regmap, > >> + struct clk *plls[2], struct clk *ex_dlys[2], bool compat); > > > > so you have an exported symbol for clk driver init in phy driver header? > > can you please explain why..? > > So that it can be called at the appropriate time during the phy's probe function. > > This is really an integral part of the phy driver, but I was directed to split it > off and put it in another subsystem's directory. That is right clock should be belong to clk driver. IIUC the hardware is phy along with clocks and you are doing the clk init. I think that may not be correct model, you should really have a device tree node to represent the clock and the phy node What stops this from being modelled as it is in the hardware? -- ~Vinod