From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B01D2C7EE25 for ; Mon, 12 Jun 2023 10:44:42 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4QfpGc6M8Rz30gQ for ; Mon, 12 Jun 2023 20:44:40 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=arm.com (client-ip=217.140.110.172; helo=foss.arm.com; envelope-from=mark.rutland@arm.com; receiver=lists.ozlabs.org) X-Greylist: delayed 583 seconds by postgrey-1.37 at boromir; Mon, 12 Jun 2023 20:44:10 AEST Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lists.ozlabs.org (Postfix) with ESMTP id 4QfpG22Ck3z306V for ; Mon, 12 Jun 2023 20:44:08 +1000 (AEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5C32F2F4; Mon, 12 Jun 2023 03:34:37 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.27.163]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5BAC03F663; Mon, 12 Jun 2023 03:33:47 -0700 (PDT) Date: Mon, 12 Jun 2023 11:33:41 +0100 From: Mark Rutland To: Douglas Anderson Subject: Re: [PATCH v5 15/18] watchdog/perf: Add a weak function for an arch to detect if perf can use NMIs Message-ID: References: <20230519101840.v5.18.Ia44852044cdcb074f387e80df6b45e892965d4a1@changeid> <20230519101840.v5.15.Ic55cb6f90ef5967d8aaa2b503a4e67c753f64d3a@changeid> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230519101840.v5.15.Ic55cb6f90ef5967d8aaa2b503a4e67c753f64d3a@changeid> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ian Rogers , ito-yuichi@fujitsu.com, Lecopzer Chen , ravi.v.shankar@intel.com, Catalin Marinas , ricardo.neri@intel.com, Stephane Eranian , sparclinux@vger.kernel.org, Guenter Roeck , Will Deacon , Daniel Thompson , Andi Kleen , Marc Zyngier , Chen-Yu Tsai , Matthias Kaehlcke , kgdb-bugreport@lists.sourceforge.net, Masayoshi Mizuma , Petr Mladek , Tzung-Bi Shih , npiggin@gmail.com, Stephen Boyd , Pingfan Liu , linux-arm-kernel@lists.infradead.org, Sumit Garg , Randy Dunlap , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Andrew Morton , linuxppc-dev@lists.ozlabs.o rg, davem@davemloft.net Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, May 19, 2023 at 10:18:39AM -0700, Douglas Anderson wrote: > On arm64, NMI support needs to be detected at runtime. Add a weak > function to the perf hardlockup detector so that an architecture can > implement it to detect whether NMIs are available. > > Signed-off-by: Douglas Anderson > --- > While I won't object to this patch landing, I consider it part of the > arm64 perf hardlockup effort. I would be OK with the earlier patches > in the series landing and then not landing ${SUBJECT} patch nor > anything else later. FWIW, everything prior to this looks fine to me, so I reckon it'd be worth splitting the series here and getting the buddy lockup detector in first, to avoid a log-jam on all the subsequent NMI bits. Thanks, Mark. > I'll also note that, as an alternative to this, it would be nice if we > could figure out how to make perf_event_create_kernel_counter() fail > on arm64 if NMIs aren't available. Maybe we could add a "must_use_nmi" > element to "struct perf_event_attr"? > > (no changes since v4) > > Changes in v4: > - ("Add a weak function for an arch to detect ...") new for v4. > > include/linux/nmi.h | 1 + > kernel/watchdog_perf.c | 12 +++++++++++- > 2 files changed, 12 insertions(+), 1 deletion(-) > > diff --git a/include/linux/nmi.h b/include/linux/nmi.h > index 47db14e7da52..eb616fc07c85 100644 > --- a/include/linux/nmi.h > +++ b/include/linux/nmi.h > @@ -210,6 +210,7 @@ static inline bool trigger_single_cpu_backtrace(int cpu) > > #ifdef CONFIG_HARDLOCKUP_DETECTOR_PERF > u64 hw_nmi_get_sample_period(int watchdog_thresh); > +bool arch_perf_nmi_is_available(void); > #endif > > #if defined(CONFIG_HARDLOCKUP_CHECK_TIMESTAMP) && \ > diff --git a/kernel/watchdog_perf.c b/kernel/watchdog_perf.c > index 349fcd4d2abc..8ea00c4a24b2 100644 > --- a/kernel/watchdog_perf.c > +++ b/kernel/watchdog_perf.c > @@ -234,12 +234,22 @@ void __init hardlockup_detector_perf_restart(void) > } > } > > +bool __weak __init arch_perf_nmi_is_available(void) > +{ > + return true; > +} > + > /** > * watchdog_hardlockup_probe - Probe whether NMI event is available at all > */ > int __init watchdog_hardlockup_probe(void) > { > - int ret = hardlockup_detector_event_create(); > + int ret; > + > + if (!arch_perf_nmi_is_available()) > + return -ENODEV; > + > + ret = hardlockup_detector_event_create(); > > if (ret) { > pr_info("Perf NMI watchdog permanently disabled\n"); > -- > 2.40.1.698.g37aff9b760-goog >