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From: Niklas Cassel <cassel@kernel.org>
To: Kishon Vijay Abraham I <kvijayab@amd.com>
Cc: "Krzysztof Wilczyński" <kw@linux.com>,
	"Kunihiko Hayashi" <hayashi.kunihiko@socionext.com>,
	linux-pci@vger.kernel.org,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Frank Li" <Frank.Li@nxp.com>,
	"Minghuan Lian" <minghuan.Lian@nxp.com>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Fabio Estevam" <festevam@gmail.com>,
	"Marek Vasut" <marek.vasut+renesas@gmail.com>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Dave Jiang" <dave.jiang@intel.com>,
	linux-tegra@vger.kernel.org,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"NXP Linux Team" <linux-imx@nxp.com>,
	"Allen Hubbe" <allenbh@gmail.com>,
	"Richard Zhu" <hongxing.zhu@nxp.com>,
	"Srikanth Thokala" <srikanth.thokala@intel.com>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Mingkai Hu" <mingkai.hu@nxp.com>,
	linux-arm-kernel@lists.infradead.org,
	"Roy Zang" <roy.zang@nxp.com>,
	linuxppc-dev@lists.ozlabs.org,
	"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
	linux-renesas-soc@vger.kernel.org, ntb@lists.linux.dev,
	"Masami Hiramatsu" <mhiramat@kernel.org>,
	"Pengutronix Kernel Team" <kernel@pengutronix.de>,
	"Jon Mason" <jdmason@kudzu.us>, "Shawn Guo" <shawnguo@kernel.org>,
	"Lucas Stach" <l.stach@pengutronix.de>
Subject: Re: [PATCH 0/2] PCI endpoint BAR hardware description cleanup
Date: Wed, 14 Feb 2024 11:38:47 +0100	[thread overview]
Message-ID: <ZcyYNzYo9HiQi4DY@x1-carbon> (raw)
In-Reply-To: <7a243a1e-6b47-bc2f-c538-b57db1c9c580@amd.com>

On Wed, Feb 14, 2024 at 09:47:54AM +0530, Kishon Vijay Abraham I wrote:
> Hi Niklas,
> 
> On 2/10/2024 6:56 AM, Niklas Cassel wrote:
> > The series is based on top of:
> > https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/log/?h=endpoint
> > 
> > 
> > Hello all,
> > 
> > This series cleans up the hardware description for PCI endpoint BARs.
> > 
> > The problems with the existing hardware description:
> > -The documentation is lackluster.
> > -Some of the names are confusingly similar, e.g. fixed_64bit and
> >   fixed_size, even though these are for completely unrelated things.
> > -The way that the BARs are defined in the endpoint controller drivers
> >   is messy, because the left hand side is not a BAR, so you can mark a
> >   BAR as e.g. both fixed size and reserved.
> > 
> > This series tries to address all the problems above.
> > 
> > Personally, I think that the code is more readable, both the endpoint
> > controller drivers, but also pci-epc-core.c.
> 
> Thank you for cleaning this up!
> 
> FWIW:
> Reviewed-by: Kishon Vijay Abraham I <kishon@kernel.org>

IMHO, a FWIW is quite the undersell here, as there is no R-b I would value
higher than the R-b from the original author or the pci endpoint subsystem :)


Kind regards,
Niklas

      reply	other threads:[~2024-02-14 10:39 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-10  1:26 [PATCH 0/2] PCI endpoint BAR hardware description cleanup Niklas Cassel
2024-02-10  1:26 ` [PATCH 1/2] PCI: endpoint: Clean up hardware description for BARs Niklas Cassel
2024-02-16 11:19   ` Manivannan Sadhasivam
2024-02-16 11:25     ` Manivannan Sadhasivam
2024-02-14  4:17 ` [PATCH 0/2] PCI endpoint BAR hardware description cleanup Kishon Vijay Abraham I
2024-02-14 10:38   ` Niklas Cassel [this message]

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