From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A9366C48BEB for ; Wed, 14 Feb 2024 10:39:44 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=NM4tcHce; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4TZZSt6Mk7z3cPt for ; Wed, 14 Feb 2024 21:39:42 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=NM4tcHce; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=139.178.84.217; helo=dfw.source.kernel.org; envelope-from=cassel@kernel.org; receiver=lists.ozlabs.org) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4TZZS52zXpz3bWH for ; Wed, 14 Feb 2024 21:39:01 +1100 (AEDT) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 86E53618B6; Wed, 14 Feb 2024 10:38:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 55909C433C7; Wed, 14 Feb 2024 10:38:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707907139; bh=eslzQormGDUUKR6M3wUfA/wR65g2VVIMI2OcUV5+luQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=NM4tcHcenWq1MQ46lCcjZguB2y0u9a08wBEfpVvvyTs7aHG6ltzW76Dp3veftpT3j i1Z8OUTTxKwVUAmyDMA+HXFG+VHMfUSpBXFYQKnXtfp4zAw9tSsPC4LsKRiXuq2zAg HvqopQ1KrOMmaeAddUivvw1SPeSBFS4rs/JYB6OWbu8LyMbywWfLlGHwIwSoPCUba+ CR/KZxC/S7C6BvcQ6xEq1ZAT/XwXhgiHFAmVMnZNvfQpiBQ54hkBW5XE+iCSel8XF/ fPXVUiky2QMlDUFAJiVqHbMLhldLNckU/yM4uw7ip+kHMlzdMUBZ1fj64JKT3Rpf6g dEPOCUfNAx76A== Date: Wed, 14 Feb 2024 11:38:47 +0100 From: Niklas Cassel To: Kishon Vijay Abraham I Subject: Re: [PATCH 0/2] PCI endpoint BAR hardware description cleanup Message-ID: References: <20240210012634.600301-1-cassel@kernel.org> <7a243a1e-6b47-bc2f-c538-b57db1c9c580@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7a243a1e-6b47-bc2f-c538-b57db1c9c580@amd.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Kunihiko Hayashi , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Frank Li , Minghuan Lian , Thierry Reding , Manivannan Sadhasivam , Fabio Estevam , Marek Vasut , Kishon Vijay Abraham I , Rob Herring , Dave Jiang , linux-tegra@vger.kernel.org, Jonathan Hunter , NXP Linux Team , Allen Hubbe , Richard Zhu , Srikanth Thokala , Sascha Hauer , Damien Le Moal , Bjorn Helgaas , Mingkai Hu , linux-arm-kernel@lists.infradead.org, Roy Zang , linuxppc-dev@lists.ozlabs .org, Yoshihiro Shimoda , linux-renesas-soc@vger.kernel.org, ntb@lists.linux.dev, Masami Hiramatsu , Pengutronix Kernel Team , Jon Mason , Shawn Guo , Lucas Stach Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Feb 14, 2024 at 09:47:54AM +0530, Kishon Vijay Abraham I wrote: > Hi Niklas, > > On 2/10/2024 6:56 AM, Niklas Cassel wrote: > > The series is based on top of: > > https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/log/?h=endpoint > > > > > > Hello all, > > > > This series cleans up the hardware description for PCI endpoint BARs. > > > > The problems with the existing hardware description: > > -The documentation is lackluster. > > -Some of the names are confusingly similar, e.g. fixed_64bit and > > fixed_size, even though these are for completely unrelated things. > > -The way that the BARs are defined in the endpoint controller drivers > > is messy, because the left hand side is not a BAR, so you can mark a > > BAR as e.g. both fixed size and reserved. > > > > This series tries to address all the problems above. > > > > Personally, I think that the code is more readable, both the endpoint > > controller drivers, but also pci-epc-core.c. > > Thank you for cleaning this up! > > FWIW: > Reviewed-by: Kishon Vijay Abraham I IMHO, a FWIW is quite the undersell here, as there is no R-b I would value higher than the R-b from the original author or the pci endpoint subsystem :) Kind regards, Niklas