From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2AED7C5479F for ; Thu, 22 Feb 2024 16:57:24 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=UFMz9Kat; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4TgfSy5pC1z3dfM for ; Fri, 23 Feb 2024 03:57:22 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=UFMz9Kat; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.intel.com (client-ip=198.175.65.15; helo=mgamail.intel.com; envelope-from=andriy.shevchenko@linux.intel.com; receiver=lists.ozlabs.org) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4TgfS4346wz3dHD for ; Fri, 23 Feb 2024 03:56:35 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708620996; x=1740156996; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=huc/iR8sXK46IqfaL7hOgtCi7xC9fXmaG1/DxLXN/s4=; b=UFMz9KatITb48RfwFqebNjNFvUmHqRbXtIPvy8S3jwvdc31CIDDajMkf QT2m/hAmMNdObUazIKIjdCAWa4VGcQ4R1j5/0epGz35sNHeXP+0VHiMIf OCmdkZKzMBPkROOhsqA0ssNVpfE8H7RLuVuySrVCNL1l2LrWRoAJE2KvB HR87bvwPcma190yIAJ1jOi6yCpsoPSj9pmkefy9Xmv71+oMzb8tMSj/6C cWsA+StIs41lyoCU/+LJgY14MpbySo5o6mngsW00k6w4bcXyfTIgyb+d5 NK4Gc1op6YnWHD8rJWWNQhaONsQ7/9maS6YrqnZJZgOB7NIS55BsIWTfb w==; X-IronPort-AV: E=McAfee;i="6600,9927,10992"; a="6679415" X-IronPort-AV: E=Sophos;i="6.06,179,1705392000"; d="scan'208";a="6679415" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Feb 2024 08:56:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10992"; a="913555622" X-IronPort-AV: E=Sophos;i="6.06,179,1705392000"; d="scan'208";a="913555622" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga002.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Feb 2024 08:56:29 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rdCN0-00000006gK3-18Lx; Thu, 22 Feb 2024 18:56:26 +0200 Date: Thu, 22 Feb 2024 18:56:26 +0200 From: Andy Shevchenko To: Herve Codina Subject: Re: [PATCH v4 1/5] net: wan: Add support for QMC HDLC Message-ID: References: <20240222142219.441767-1-herve.codina@bootlin.com> <20240222142219.441767-2-herve.codina@bootlin.com> <20240222174501.4cbe03ab@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240222174501.4cbe03ab@bootlin.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Vadim Fedorenko , Yury Norov , netdev@vger.kernel.org, Rasmus Villemoes , linux-kernel@vger.kernel.org, Eric Dumazet , Mark Brown , Thomas Petazzoni , Jakub Kicinski , Paolo Abeni , linuxppc-dev@lists.ozlabs.org, "David S. Miller" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Feb 22, 2024 at 05:45:01PM +0100, Herve Codina wrote: > On Thu, 22 Feb 2024 17:29:05 +0200 > Andy Shevchenko wrote: > > On Thu, Feb 22, 2024 at 03:22:14PM +0100, Herve Codina wrote: ... > > > + spin_lock_irqsave(&qmc_hdlc->tx_lock, flags); > > > > Why not using cleanup.h from day 1? > > I don't know about cleanup.h. > Can you tell me more ? > How should I use it ? > > > > +end: > > > > This label, in particular, will not be needed with above in place. > > > > > + spin_unlock_irqrestore(&qmc_hdlc->tx_lock, flags); > > > + return ret; > > > +} Here are the examples: 6191e49de389 ("pinctrl: baytrail: Simplify code with cleanup helpers") 1d1b4770d4b6 ("platform/x86/intel/vsec: Use cleanup.h") e2eeddefb046 ("pstore: inode: Convert mutex usage to guard(mutex)") Some advanced stuff: ced085ef369a ("PCI: Introduce cleanup helpers for device reference counts and locks") Hope this helps. -- With Best Regards, Andy Shevchenko