From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 29855C27C53 for ; Fri, 7 Jun 2024 09:23:05 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=Vq/ngASC; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4VwbMq1nd9z3cGb for ; Fri, 7 Jun 2024 19:23:03 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=Vq/ngASC; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=2604:1380:4641:c500::1; helo=dfw.source.kernel.org; envelope-from=cassel@kernel.org; receiver=lists.ozlabs.org) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4VwbLY0HPbz3c5J for ; Fri, 7 Jun 2024 19:21:56 +1000 (AEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id BA79C61F2E; Fri, 7 Jun 2024 09:21:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EA625C2BBFC; Fri, 7 Jun 2024 09:21:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717752115; bh=mkI9Zleemp+5fJfBU0GcUZWrMN2oLrp/WKztAvoJ3vY=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Vq/ngASCb2PCKhRAbva5iVV9N8kqnIlkHsohtzvANVFjV1DDyAL0TN2UQAPoldLNW v3sAUcxfKxJTN15EKoiI4H9hbsB5XBUN8xvf8LvEyHWVv0YLhDtQnttgClP7zcf9bB 9+cimC+7UIPVxS6hSHqNafOxRvskvteDvcNu5W9bFgN+IJuB+xYSA3VRh8HeJ3ciF5 245pY+YWiCo1jQGVdSXp/8it4oYatSXX2GsENiVxQ63kTkCousJoMMY88chQs2Nvz9 Qkviu3aYYBDgpM2AWvu7CUwyLcQCTh/XN/iBZspUoxv3tH5+pIE3JeS5oP2rY6oq/l GEEiy0iiT1ZFA== Date: Fri, 7 Jun 2024 11:21:44 +0200 From: Niklas Cassel To: Manivannan Sadhasivam Subject: Re: [PATCH 3/5] PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle Link Down event Message-ID: References: <20240606-pci-deinit-v1-0-4395534520dc@linaro.org> <20240606-pci-deinit-v1-3-4395534520dc@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240606-pci-deinit-v1-3-4395534520dc@linaro.org> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Vignesh Raghavendra , Kunihiko Hayashi , imx@lists.linux.dev, linux-pci@vger.kernel.org, Lorenzo Pieralisi , Minghuan Lian , Thierry Reding , Fabio Estevam , Marek Vasut , Kishon Vijay Abraham I , Rob Herring , Jesper Nilsson , linux-tegra@vger.kernel.org, linux-arm-kernel@axis.com, Jonathan Hunter , linux-arm-kernel@lists.infradead.org, Siddharth Vadapalli , Richard Zhu , Srikanth Thokala , linux-arm-msm@vger.kernel.org, Sascha Hauer , linuxppc-dev@lists.ozlabs.org, Bjorn Helgaas , linux-omap@vger.kernel.org, Mingkai Hu , Roy Zang , Jingoo Han , Yoshihiro Shimoda , linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-renesas-soc@vger.kernel.org, Masami Hiramatsu , Pengutronix Kernel Team , Shawn Guo , Lucas Stach Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Jun 06, 2024 at 12:56:36PM +0530, Manivannan Sadhasivam wrote: > As per the PCIe base spec r5.0, section 5.2, Link Down event can happen > under any of the following circumstances: > > 1. Fundamental/Hot reset > 2. Link disable transmission by upstream component > 3. Moving from L2/L3 to L0 > > In those cases, Link Down causes some non-sticky DWC registers to loose the > state (like REBAR, etc...). So the drivers need to reinitialize them to > function properly once the link comes back again. > > This is not a problem for drivers supporting PERST# IRQ, since they can > reinitialize the registers in the PERST# IRQ callback. But for the drivers > not supporting PERST#, there is no way they can reinitialize the registers > other than relying on Link Down IRQ received when the link goes down. So > let's add a DWC generic API dw_pcie_ep_linkdown() that reinitializes the > non-sticky registers and also notifies the EPF drivers about link going > down. > > This API can also be used by the drivers supporting PERST# to handle the > scenario (2) mentioned above. > > NOTE: For the sake of code organization, move the dw_pcie_ep_linkup() > definition just above dw_pcie_ep_linkdown(). > > Reviewed-by: Niklas Cassel > Signed-off-by: Manivannan Sadhasivam > --- Like Siddharth reported, this patch is already in pci/next.