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Thu, 2 Feb 2023 07:15:15 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B283B2004D; Thu, 2 Feb 2023 07:15:15 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 33AAD20040; Thu, 2 Feb 2023 07:15:15 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 2 Feb 2023 07:15:15 +0000 (GMT) Received: from [10.61.2.128] (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id E803C60112; Thu, 2 Feb 2023 18:15:09 +1100 (AEDT) Message-ID: Subject: Re: [PATCH v2 4/4] powerpc/rtas: upgrade internal arch spinlocks From: Andrew Donnellan To: Nathan Lynch , linuxppc-dev@lists.ozlabs.org Date: Thu, 02 Feb 2023 18:15:09 +1100 In-Reply-To: <20230124140448.45938-5-nathanl@linux.ibm.com> References: <20230124140448.45938-1-nathanl@linux.ibm.com> <20230124140448.45938-5-nathanl@linux.ibm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.3 (3.46.3-1.fc37) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: FvNQgrnUCNFbOko5gWd4M7soNdR6IM2M X-Proofpoint-ORIG-GUID: -p4Aqnq5Fv00mWeSa2OuTCGDa4540msv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-01_15,2023-01-31_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=804 suspectscore=0 mlxscore=0 spamscore=0 adultscore=0 impostorscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 bulkscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302020066 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ldufour@linux.ibm.com, npiggin@gmail.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, 2023-01-24 at 08:04 -0600, Nathan Lynch wrote: > At the time commit f97bb36f705d ("powerpc/rtas: Turn rtas lock into a > raw spinlock") was written, the spinlock lockup detection code called > __delay(), which will not make progress if the timebase is not > advancing. Since the interprocessor timebase synchronization sequence > for chrp, cell, and some now-unsupported Power models can temporarily > freeze the timebase through an RTAS function (freeze-time-base), the > lock that serializes most RTAS calls was converted to arch_spinlock_t > to prevent kernel hangs in the lockup detection code. >=20 > However, commit bc88c10d7e69 ("locking/spinlock/debug: Remove > spinlock > lockup detection code") removed that inconvenient property from the > lock debug code several years ago. So now it should be safe to > reintroduce generic locks into the RTAS support code, primarily to > increase lockdep coverage. >=20 > Making rtas_lock a spinlock_t would violate lock type nesting rules > because it can be acquired while holding raw locks, e.g. pci_lock and > irq_desc->lock. So convert it to raw_spinlock_t. There's no apparent > reason not to upgrade timebase_lock as well. >=20 > Signed-off-by: Nathan Lynch I'm no locking expert but this looks reasonable from a quick read- through. Reviewed-by: Andrew Donnellan --=20 Andrew Donnellan OzLabs, ADL Canberra ajd@linux.ibm.com IBM Australia Limited