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Fri, 16 May 2025 13:06:56 +0200 (CEST) X-Amavis-Modified: Mail body modified (using disclaimer) - mta-out04.sim.rediris.es Received: from sim.rediris.es ([127.0.0.1]) by localhost (mta-out04.sim.rediris.es [127.0.0.1]) (amavis, port 10026) with ESMTP id IkzjQ4rBb6FP; Fri, 16 May 2025 13:06:56 +0200 (CEST) Received: from lt-gp.iram.es (haproxy01.sim.rediris.es [130.206.24.69]) by sim.rediris.es (Postfix) with ESMTPA id E3CE4181FA5; Fri, 16 May 2025 13:06:55 +0200 (CEST) Date: Fri, 16 May 2025 13:06:54 +0200 From: Gabriel Paubert To: Herbert Xu Cc: kernel test robot , oe-kbuild-all@lists.linux.dev, Linux Crypto Mailing List , Venkat Rao Bagalkote , Madhavan Srinivasan , Stephen Rothwell , Danny Tsen , linuxppc-dev@lists.ozlabs.org, Michael Ellerman Subject: Re: [PATCH] powerpc: Add gcc 128-bit shift helpers Message-ID: References: <202505152053.FrKekjCe-lkp@intel.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTE2MDEwNSBTYWx0ZWRfX7CsnzgdvuQVa Hc0cXDxfh9yA4+m/JqkPrYv58GcaKF2gqvrkHtx4ktpgF+qchKBAmO1vfHLNXItrxaNVEmmS5yA iQ5B0ELhcz8FOhNRnOfb++zNkj5qRa44Bdxqjz9WyKxw1Fkqk7eHk92A/qc675NjLSAYuI+0szR ve5FtbhAH+qplRVNcdyhzkKqJJf8mQg+pncjyCpBWQKSeKOjA0FbBvuJrcxES4u6kycmPs28fDz R6+Wk8hrNqdnWD/ofZ/P2fwtxJ92VlL6/NdE/C/j7DYd/UChPGvNdibzZNOWJuKjK6liRb3pks5 EB64UGcBZCabpVQrWY839k5+3fsfT+/36RHAmhB6b+++0oB13dY9s2aIezsZ7kX0PQla7Ejbeo9 XVSPThMtUaR7gPt/oCEHfgFOOf+h0QI0jvps/AhgmqsZwQxddlKBu+vixOL25xlnfTGh4RNX X-Proofpoint-GUID: H_SYM61NNgWlRx99XEkaczkpNMGGkLti X-Proofpoint-ORIG-GUID: H_SYM61NNgWlRx99XEkaczkpNMGGkLti X-Authority-Analysis: v=2.4 cv=EtzSrTcA c=1 sm=1 tr=0 ts=68271c51 cx=c_pps a=Kke4r4mcy+kRAsMtzpf9hg==:117 a=Kke4r4mcy+kRAsMtzpf9hg==:17 a=kj9zAlcOel0A:10 a=dt9VzEwgFbYA:10 a=VwQbUJbxAAAA:8 a=i3X5FwGiAAAA:8 a=QyXUC8HyAAAA:8 a=FNyBlpCuAAAA:8 a=LpSzYAz8VI8wa4E5YnoA:9 a=CjuIK1q_8ugA:10 a=mmqRlSCDY2ywfjPLJ4af:22 a=RlW-AWeGUCXs_Nkyno-6:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-16_04,2025-05-16_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=salida_notspam policy=salida score=0 mlxscore=0 malwarescore=0 bulkscore=0 phishscore=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 impostorscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 clxscore=1011 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505070000 definitions=main-2505160105 On Fri, May 16, 2025 at 04:46:17PM +0800, Herbert Xu wrote: > On Thu, May 15, 2025 at 08:06:09PM +0800, kernel test robot wrote: > > tree: https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git__;!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkbHT4vfog$ master > > head: 484803582c77061b470ac64a634f25f89715be3f > > commit: c66d7ebbe2fa14e41913adb421090a7426f59786 [10914/11408] crypto: powerpc/poly1305 - Add SIMD fallback > > config: powerpc64-randconfig-002-20250515 (https://urldefense.com/v3/__https://download.01.org/0day-ci/archive/20250515/202505152053.FrKekjCe-lkp@intel.com/config__;!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkaPDLMaoA$ ) > > compiler: powerpc64-linux-gcc (GCC) 8.5.0 > > reproduce (this is a W=1 build): (https://urldefense.com/v3/__https://download.01.org/0day-ci/archive/20250515/202505152053.FrKekjCe-lkp@intel.com/reproduce__;!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkbNYWK3LQ$ ) > > Thanks for the report. This patch should fix the problem. It won't work for big endian, nor for 32 bit obviously. Besides that, in arch/power/kernel/misc_32.S, you'll find a branchless version of these functions. It's for 64 bit shifts on 32 bit big-endian but it can easily be adapted to 128 bit shifts on 64 bit processors (swapping r3 and r4 depending on endianness). Several functions of kernel/misc_32.S should arguably be moved to lib/. Cheers, Gabriel > > ---8<--- > When optimising for size, gcc generates out-of-line calls for 128-bit > integer shifts. Add these functions to avoid build errors. > > Fixes: c66d7ebbe2fa ("crypto: powerpc/poly1305 - Add SIMD fallback") > Reported-by: kernel test robot > Closes: https://urldefense.com/v3/__https://lore.kernel.org/oe-kbuild-all/202505152053.FrKekjCe-lkp@intel.com/__;!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkbo7rsvYg$ > Signed-off-by: Herbert Xu > > diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile > index 1cd74673cbf7..a41c071c1652 100644 > --- a/arch/powerpc/lib/Makefile > +++ b/arch/powerpc/lib/Makefile > @@ -87,3 +87,5 @@ obj-$(CONFIG_CRC_T10DIF_ARCH) += crc-t10dif-powerpc.o > crc-t10dif-powerpc-y := crc-t10dif-glue.o crct10dif-vpmsum_asm.o > > obj-$(CONFIG_PPC64) += $(obj64-y) > + > +obj-$(CONFIG_ARCH_SUPPORTS_INT128) += tishift.o > diff --git a/arch/powerpc/lib/tishift.S b/arch/powerpc/lib/tishift.S > new file mode 100644 > index 000000000000..79afef2d8d54 > --- /dev/null > +++ b/arch/powerpc/lib/tishift.S > @@ -0,0 +1,54 @@ > +/* SPDX-License-Identifier: GPL-2.0-or-later */ > +/* > + * Copyright (c) 2025 Herbert Xu > + */ > +#include > +#include > + > +_GLOBAL(__lshrti3) > + cmplwi r5,63 > + ble 1f > + addi r5,r5,-64 > + srd r3,r4,r5 > + li r4,0 > + blr > +1: > + subfic r7,r5,64 > + srd r3,r3,r5 > + sld r6,r4,r7 > + srd r4,r4,r5 > + or r3,r3,r6 > + blr > +EXPORT_SYMBOL(__lshrti3) > + > +_GLOBAL(__ashrti3) > + cmplwi r5,63 > + ble 1f > + addi r5,r5,-64 > + srad r3,r4,r5 > + sradi r4,r4,63 > + blr > +1: > + subfic r7,r5,64 > + srd r3,r3,r5 > + sld r6,r4,r7 > + srad r4,r4,r5 > + or r3,r3,r6 > + blr > +EXPORT_SYMBOL(__ashrti3) > + > +_GLOBAL(__ashlti3) > + cmplwi r5,63 > + ble 1f > + addi r5,r5,-64 > + sld r4,r3,r5 > + li r3,0 > + blr > +1: > + subfic r7,r5,64 > + sld r4,r4,r5 > + srd r6,r3,r7 > + sld r3,r3,r5 > + or r4,r4,r6 > + blr > +EXPORT_SYMBOL(__ashlti3) > -- > Email: Herbert Xu > Home Page: https://urldefense.com/v3/__http://gondor.apana.org.au/*herbert/__;fg!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkbwt6bO1g$ > PGP Key: https://urldefense.com/v3/__http://gondor.apana.org.au/*herbert/pubkey.txt__;fg!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkam0aoZDQ$ >